通过SPI读写CC2500的寄存器错误
大家好！ 我通过msp430f2274的USCIB0的spi接口去控制CC2500，但是通过msp430给cc2500的寄存器写入一个值，然后再读取该寄存器，结果得到的值（总是0x0F）跟之前写入的不一样，请问有哪些原因可以导致这种情况？？我用万用表点过，貌似SPI口都是连接正确的，程序也不会有多大问题。我的CC2500的外围电路就是按照datasheet中的推荐电路设计的，不过焊接时只焊接了图中用红圈圈住的期间。 5.6K的电阻被1K替换后，会造成这种影响吗？http://cache.amobbs.com/bbs_upload782111/files_34/ourdev_590194LV2QRQ.jpg
CC2500外围电路 (原文件名:2010-10-15_224049.jpg) 网上有源代码，请耐心寻找，也可联系我，13641248742短信，chuandaoxy@126.com 我也贴一下代码：
void main()
{
WDTCTL = WDTHOLD + WDTPW;
// 初始化SPI接口
SPISetup();
_NOP();
PowerupResetCCxxxx();
// 测试SPI
SPIWriteReg(TI_CCxxx0_IOCFG0, 0x09);
testValue = SPIReadReg(TI_CCxxx0_IOCFG0);
_NOP();
_NOP();
}
void SPISetup(void)
{
TI_CC_CSn_PxDIR |= TI_CC_CSn_PIN; // /CS disable
TI_CC_CSn_PxOUT |= TI_CC_CSn_PIN;
UCB0CTL0 |= UCMST+UCCKPL+UCMSB+UCSYNC; // 3-pin, 8-bit SPI master
UCB0CTL1 |= UCSSEL_2; // SMCLK
UCB0BR0 |= 0x02; // UCLK/2
UCB0BR1 = 0;
//UCB0MCTL = 0;
TI_CC_SPI_USCIB0_PxSEL |= TI_CC_SPI_USCIB0_SIMO | TI_CC_SPI_USCIB0_SOMI | TI_CC_SPI_USCIB0_UCLK;
// SPI option select
TI_CC_SPI_USCIB0_PxDIR |= TI_CC_SPI_USCIB0_SIMO | TI_CC_SPI_USCIB0_UCLK;
// SPI TXD out direction
UCB0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
}
// Delay function. # of CPU cycles delayed is similar to "cycles". Specifically,
// it's ((cycles-15) % 6) + 15.Not exact, but gives a sense of the real-time
// delay.Also, if MCLK ~1MHz, "cycles" is similar to # of useconds delayed.
void Wait(unsigned int cycles)
{
while(cycles>15) // 15 cycles consumed by overhead
cycles = cycles - 6; // 6 cycles consumed each iteration
}
void SPIWriteReg(char addr, char value)
{
TI_CC_CSn_PxOUT &= ~TI_CC_CSn_PIN; // /CS enable
while (TI_CC_SPI_USCIB0_PxIN&TI_CC_SPI_USCIB0_SOMI); // Wait for CCxxxx ready
IFG2 &= ~UCB0RXIFG; // Clear flag
UCB0TXBUF = (addr | TI_CCxxx0_READ_SINGLE); // Send address ( addr | 0x80)
while (!(IFG2&UCB0RXIFG)); // Wait for TX to finish
IFG2 &= ~UCB0RXIFG; // Clear flag
UCB0TXBUF = value; // Send data
while (!(IFG2&UCB0RXIFG)); // Wait for TX to finish
TI_CC_CSn_PxOUT |= TI_CC_CSn_PIN; // /CS disable
}
char SPIReadReg(char addr)
{
char tmp;
TI_CC_CSn_PxOUT &= ~TI_CC_CSn_PIN; // Enable CSn
while (!(IFG2&UCB0TXIFG)); // Wait for TX to finish
UCB0TXBUF = addr; // Send address
while (!(IFG2&UCB0TXIFG)); // Wait for TX to finish
UCB0TXBUF = 0; // Dummy write so we can read data
// Address is now being TX'ed, with dummy byte waiting in TXBUF...
while (!(IFG2&UCB0RXIFG)); // Wait for RX to finish
// Dummy byte RX'ed during addr TX now in RXBUF
IFG2 &= ~UCB0RXIFG; // Clear flag set during addr write
while (!(IFG2&UCB0RXIFG)); // Wait for end of dummy byte TX
// Data byte RX'ed during dummy byte write is now in RXBUF
tmp = UCB0RXBUF; // Read data
TI_CC_CSn_PxOUT |= TI_CC_CSn_PIN; // /CS disable
return tmp;
}
void PowerupResetCCxxxx(void)
{
TI_CC_CSn_PxOUT |= TI_CC_CSn_PIN;
Wait(30);
TI_CC_CSn_PxOUT &= ~TI_CC_CSn_PIN;
Wait(30);
TI_CC_CSn_PxOUT |= TI_CC_CSn_PIN;
Wait(45);
TI_CC_CSn_PxOUT &= ~TI_CC_CSn_PIN; // /CS enable
while (TI_CC_SPI_USCIB0_PxIN&TI_CC_SPI_USCIB0_SOMI); // Wait for CCxxxx ready
UCB0TXBUF = TI_CCxxx0_SRES; // Send strobe(RST)
// Strobe addr is now being TX'ed
IFG2 &= ~UCB0RXIFG; // Clear flag
while (!(IFG2&UCB0RXIFG)); // Wait for end of addr TX
while (TI_CC_SPI_USCIB0_PxIN&TI_CC_SPI_USCIB0_SOMI);
TI_CC_CSn_PxOUT |= TI_CC_CSn_PIN; // /CS disable
}
头文件关于SPI的定义如下：
// use the USCI_B0 SPI@MSP430F2274
#define TI_CC_SPI_USCIB0_PxSELP3SEL // MSP430F2274
#define TI_CC_SPI_USCIB0_PxDIRP3DIR
#define TI_CC_SPI_USCIB0_PxIN P3IN
#define TI_CC_SPI_USCIB0_SIMO BIT1
#define TI_CC_SPI_USCIB0_SOMI BIT2
#define TI_CC_SPI_USCIB0_UCLK BIT3
#define TI_CC_CSn_PxOUT P3OUT
#define TI_CC_CSn_PxDIR P3DIR
#define TI_CC_CSn_PIN BIT0 //P3.0 --> CSn @msp430f2274
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