分享一个STM32G0的USART直接通过TIM17调制Ir发射的例子。

dog

下面的例子亲测可用。
直接将TIM17配置成38K载波输出，引脚直接驱动IR发射管即可。
只用到了USART4.TX的作为发射，波特率只能2400bps，太高不好，你可以试一下。

/***************************************************************************************************************
* Init USART4 + DMA_CH1 +TIM17
**************************************************************************************************************/
vod IrTxInit(vod)
{
    LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
    LL_TIM_InitTypeDef TIM_InitStruct = {0};
    LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0};
    // LL_TIM_BDTR_InitTypeDef TIM_BDTRInitStruct = {0};
    LL_USART_InitTypeDef USART_InitStruct = {0};

    // Enable DMA controller clock
    LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);

    // Enable Peripheral clock
    LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART4);

    // Enable GPIO Peripheral clock
    LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA | LL_IOP_GRP1_PERIPH_GPIOD);

    // Init USART Peripheral
    USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1;
    USART_InitStruct.BaudRate = 2400;
    USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
    USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
    USART_InitStruct.Parity = LL_USART_PARITY_NONE;
    USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
    USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
    USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
    LL_USART_Init(USART4, &USART_InitStruct);

    LL_USART_SetTXFIFOThreshold(USART4, LL_USART_FIFOTHRESHOLD_1_8);
    LL_USART_SetRXFIFOThreshold(USART4, LL_USART_FIFOTHRESHOLD_1_8);
    LL_USART_DisableFIFO(USART4);
    // LL_USART_ConfigAsyncMode(USART4);
    LL_USART_Enable(USART4);

    LL_USART_ConfigIrdaMode(USART4);
    LL_USART_EnableIrda(USART4);

    // Init DMA CH1 for USART4.TX
    LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_3, LL_DMAMUX_REQ_USART4_TX);
    LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_3, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
    LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_3, LL_DMA_PRIORITY_HIGH);
    LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MODE_NORMAL);
    LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_3, LL_DMA_PERIPH_NOINCREMENT);
    LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MEMORY_INCREMENT);
    LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_3, LL_DMA_PDATAALIGN_BYTE);
    LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_3, LL_DMA_MDATAALIGN_BYTE);
    LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_3, (u32)IrTxBuf,
                            LL_USART_DMA_GetRegAddr(USART4, LL_USART_DMA_REG_DATA_TRANSMIT),
                            LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_3));
    LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_3, 0);

    // Enable DMA transfer complete/error interrupts
    // LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_3);
    // LL_DMA_EnableIT_TE(DMA1, LL_DMA_CHANNEL_3);
    // LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_4);
    // LL_DMA_EnableIT_TE(DMA1, LL_DMA_CHANNEL_4);

    // DMA1_Channel1_IRQn interrupt configuration
    // NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
    // NVIC_EnableIRQ(DMA1_Channel1_IRQn);

    // DMA1_Channel2_3_IRQn interrupt configuration
    // NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0);
    // NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);

    // Enable DMA RX Interrupt
    // LL_USART_EnableDMAReq_RX(USART2);

    // Enable DMA TX Interrupt */
    LL_USART_EnableDMAReq_TX(USART4);

    // Enable DMA Channel Rx
    // LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_4);

    // Enable DMA Channel Tx
    // LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_3);

    // Init Timer17
    LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM17);
    LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);

    // Init IR_OUT Pin PB9
    GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
    GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
    GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
    GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
    GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
    GPIO_InitStruct.Alternate = LL_GPIO_AF_0;   // AF2=CH1; AF0=IR_OUT
    LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
   
    // Init Timer Base
    TIM_InitStruct.Prescaler = 0;  // 64M
    TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
    TIM_InitStruct.Autoreload = 1688; //3;    // 64M / 38K /2 = 842.10
    TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
    TIM_InitStruct.RepetitionCounter = 0;
    LL_TIM_Init(TIM17, &TIM_InitStruct);

    LL_TIM_DisableARRPreload(TIM17);

    TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_PWM1;
    TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE;
    TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE;
    TIM_OC_InitStruct.CompareValue = 1688/2;   // 50% Duty
    // TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
    // TIM_OC_InitStruct.OCNPolarity = LL_TIM_OCPOLARITY_HIGH;
    // TIM_OC_InitStruct.OCIdleState = LL_TIM_OCIDLESTATE_LOW;
    // TIM_OC_InitStruct.OCNIdleState = LL_TIM_OCIDLESTATE_LOW;
    LL_TIM_OC_Init(TIM17, LL_TIM_CHANNEL_CH1, &TIM_OC_InitStruct);
   
    LL_TIM_OC_EnablePreload(TIM17, LL_TIM_CHANNEL_CH1);
    LL_TIM_OC_DisableFast(TIM17, LL_TIM_CHANNEL_CH1);

    LL_TIM_SetTriggerOutput(TIM17, LL_TIM_TRGO_RESET);
    LL_TIM_DisableMasterSlaveMode(TIM17);

    /*
    TIM_BDTRInitStruct.OSSRState = LL_TIM_OSSR_DISABLE;
    TIM_BDTRInitStruct.OSSIState = LL_TIM_OSSI_DISABLE;
    TIM_BDTRInitStruct.LockLevel = LL_TIM_LOCKLEVEL_OFF;
    TIM_BDTRInitStruct.DeadTime = 0;
    TIM_BDTRInitStruct.BreakState = LL_TIM_BREAK_DISABLE;
    TIM_BDTRInitStruct.BreakPolarity = LL_TIM_BREAK_POLARITY_HIGH;
    TIM_BDTRInitStruct.BreakFilter = LL_TIM_BREAK_FILTER_FDIV1;
    TIM_BDTRInitStruct.AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE;
    LL_TIM_BDTR_Init(TIM17, &TIM_BDTRInitStruct);
    */

    LL_TIM_EnableCounter(TIM17);
    LL_TIM_EnableAllOutputs(TIM17);
    LL_TIM_CC_EnableChannel(TIM17, LL_TIM_CHANNEL_CH1);

    // Config IR_TIM
    {
        u32 reg;

        // Clear IR_MOD & IR_POL
        reg = SYSCFG->CFGR1 & (~0x000000E0);

        // Set IR_MOD = 10 = USART2
        reg |= 0x00000080;

        // Set IR_POL = 1
        // reg |= 0x00000020;

        SYSCFG->CFGR1 = reg;
    }
}


/***************************************************************************************************************
* @brief: Send A Serial Data by USART with DMA
* @param: dat: [in] Data Address to be send
* @param: length: [in] Data Bytes
* @return: true = success, false = failure
**************************************************************************************************************/
bol IrSend(u8 * dat, u32 length)
{
    u32 i;

    MUTEX_LOCK();

    // Judge buffer enough
    if (length > IR_TX_BUF_SIZE)
    {
        MUTEX_UNLOCK();
        return false;
    }

    IrWaitTxDone();

    // Copy Data to DMA TX Buffer
    for(i = 0; i < length; i++)
    {
        IrTxBuf = dat;
    }

    // Set DMA Tx Count
    LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_3, length);     

    // Enable DMA Channel;
    LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_3);
   
    MUTEX_UNLOCK();

    return true;
}

dog