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异步复位程序
wire clk,rst_n;
my_clock Clock_U1(.e_clk(e_clk), .e_rst_n(e_rst_n), .clk(clk) , .rst_n(rst_n)); //PLL 生成稳定时钟,并输出异步复位同步释放信号
//wire [7:0] cnt;
reg [31:0] plus_r;
reg cmp3_r,cmp4_r;
assign cmp3 = cmp3_r;
assign cmp4 = cmp4_r;
always @(posedge clk or negedge rst_n)
begin
if(!rst_n)
begin
plus_r<=1'b0;
cmp4_r <= 0;
cmp3_r <= 0;
end
else
begin
if(plus_r==32'd240000000 )
begin
cmp4_r <= ~cmp4_r;
cmp3_r <= ~cmp3_r;
plus_r <= 1'b0;
end
else
plus_r <= plus_r+1'b1;
end
end
endmodule
占用资源
同步复位
wire clk,rst_n;
my_clock Clock_U1(.e_clk(e_clk), .e_rst_n(e_rst_n), .clk(clk) , .rst_n(rst_n)); //PLL 生成稳定时钟,并输出异步复位同步释放信号
//wire [7:0] cnt;
reg [31:0] plus_r;
reg cmp3_r,cmp4_r;
assign cmp3 = cmp3_r;
assign cmp4 = cmp4_r;
always @(posedge clk /*or negedge rst_n*/)
begin
if(!rst_n)
begin
plus_r<=1'b0;
cmp4_r <= 0;
cmp3_r <= 0;
end
else
begin
if(plus_r==32'd240000000 )
begin
cmp4_r <= ~cmp4_r;
cmp3_r <= ~cmp3_r;
plus_r <= 1'b0;
end
else
plus_r <= plus_r+1'b1;
end
end
endmodule
占用资源
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阿莫论坛20周年了!感谢大家的支持与爱护!!
曾经有一段真挚的爱情摆在我的面前,我没有珍惜,现在想起来,还好我没有珍惜……
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