【请教】MT7620N U-boot复制到DDR2后无法运行

nightseas

自己做了个MT7620N核心板玩，结果ralink的uboot调不过去了。看Log DDR2貌似已经检过了，大小也识别正确，就是代码重定向到DDR后没输出了……
往有经验的朋友给点思路，多谢啦~~ DDR2颗粒为K4T51163。

*****************************************************************************

我的Log，自己加了调试信息：
U-Boot 1.1.3 (Dec 17 2014 - 21:10:07)

Board: Petrel Test Platform R0A DRAM:  
get_ram_size: Start verifing memory
        --> Retrieving addr=0x80000004
        --> Retrieving addr=0x80000008
        --> Retrieving addr=0x80000010
        --> Retrieving addr=0x80000020
        --> Retrieving addr=0x80000040
        --> Retrieving addr=0x80000080
        --> Retrieving addr=0x80000100
        --> Retrieving addr=0x80000200
        --> Retrieving addr=0x80000400
        --> Retrieving addr=0x80000800
        --> Retrieving addr=0x80001000
        --> Retrieving addr=0x80002000
        --> Retrieving addr=0x80004000
        --> Retrieving addr=0x80008000
        --> Retrieving addr=0x80010000
        --> Retrieving addr=0x80020000
        --> Retrieving addr=0x80040000
        --> Retrieving addr=0x80080000
        --> Retrieving addr=0x80100000
        --> Retrieving addr=0x80200000
        --> Retrieving addr=0x80400000
        --> Retrieving addr=0x80800000
        --> Retrieving addr=0x81000000
        --> Retrieving addr=0x82000000

Return Real size =67108864 !!
64 MB
rt2880 uboot v0.00e04 05/25/2006
SERIAL_CLOCK_DIVISOR =16
kaiker,,CONFIG_BAUDRATE =115200
SDRAM SIZE:04000000
Top of RAM usable for U-Boot at: 84000000
Reserving 275k for U-Boot at: 83fb8000
Reserving 260k for malloc() at: 83f77000
Reserving 44 Bytes for Board Info at: 83f76fd4
Reserving 36 Bytes for Global Data at: 83f76fb0
Reserving 128k for boot params() at: 83f56fb0
Stack Pointer at: 83f56f98
relocate_code Pointer at: 83fb8000
（死在这里……）

**************************************************************************************************

附上别人板子正常的Log，没加调试信息的：
U-Boot 1.1.3 (Feb 15 2014 - 19:45:10)

Board: Ralink SOC AP DRAM:  64 MB
relocate_code Pointer at: 83fb4000
enable ephy clock...done. rf reg 29 = 5
SSC disabled.
spi_wait_nsec: 29
spi device id: c2 20 18 c2 20 (2018c220)
find flash: MX25L12805D
raspi_read: from:30000 len:1000
*** Warning - bad CRC, using default environment

============================================
Drogoo UBoot Version: 4.1.2.0
--------------------------------------------
Ralink ASIC (Port5<->None)
DRAM component: 512 Mbits DDR, width 16
DRAM bus: 16 bit
Total memory: 64 MBytes
Flash component: SPI Flash
Date:Feb 15 2014  Time:19:45:10
============================================
icache: sets:512, ways:4, linesz:32 ,total:65536
dcache: sets:256, ways:4, linesz:32 ,total:32768

##### The CPU freq = 580 MHZ ####
estimate memory size =64 Mbytes

Please choose the operation:
   1: Load system code to SDRAM via TFTP.
   2: Load system code then write to Flash via TFTP.
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   7: Load Boot Loader code then write to Flash via Serial.
   9: Load Boot Loader code then write to Flash via TFTP.

nightseas

没有人在做7620吗