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Critical Warning (332168): The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command.
Critical Warning (332169): From FPGA_CLK (Rise) to FPGA_CLK (Rise) (setup and hold)
Critical Warning (332169): From cnt_clk (Rise) to FPGA_CLK (Rise) (setup and hold)
Critical Warning (332169): From FPGA_CLK (Rise) to cnt_clk (Rise) (setup and hold)
Critical Warning (332169): From cnt_clk (Rise) to cnt_clk (Rise) (setup and hold)
FPGA_CLK :是我的系统时钟 25M
cnt_clk :是经过系统时钟PLL倍频的一个100M的时钟 |
阿莫论坛20周年了!感谢大家的支持与爱护!!
知道什么是神吗?其实神本来也是人,只不过神做了人做不到的事情 所以才成了神。 (头文字D, 杜汶泽)
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