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![](static/image/common/ico_lz.png)
楼主 |
发表于 2013-7-3 19:24:27
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- module uart8n1(
- input rst,
- input clk,
- input [3:0]rxd,
- output txd
- );
- parameter true = 1'b0, false = 1'b1;
- wire txen, txfull, txempty, txhfull;
- wire [7:0] dat;
- wire [3:0] rdrxd;
- wire [3:0] rxfull;
- wire [3:0] rxempty;
- wire [3:0] rxhfull;
- uart8n1_ctrl ctrl(
- .rst(rst),
- .clk(clk),
- .rxhfull(rxhfull),
- .txhfull(txhfull),
- .txen(txen),
- .rdrxd(rdrxd)
- );
- uart8n1_rx rx1(
- .rst(rst),
- .clk(clk),
- .rxd(rxd[0]),
- .rxen(true),
- .divp(50_000_000/115_200), //fclk/baud
- .rdrxd(rdrxd[0]),
- .dat(dat),
- .rxfull(rxfull[0]),
- .rxempty(rxempty[0]),
- .rxhfull(rxhfull[0])
- );
- uart8n1_rx rx2(
- .rst(rst),
- .clk(clk),
- .rxd(rxd[1]),
- .rxen(true),
- .divp(50_000_000/115_200), //fclk/baud
- .rdrxd(rdrxd[1]),
- .dat(dat),
- .rxfull(rxfull[1]),
- .rxempty(rxempty[1]),
- .rxhfull(rxhfull[1])
- );
- uart8n1_rx rx3(
- .rst(rst),
- .clk(clk),
- .rxd(rxd[2]),
- .rxen(true),
- .divp(50_000_000/115_200), //fclk/baud
- .rdrxd(rdrxd[2]),
- .dat(dat),
- .rxfull(rxfull[2]),
- .rxempty(rxempty[2]),
- .rxhfull(rxhfull[2])
- );
- uart8n1_rx rx4(
- .rst(rst),
- .clk(clk),
- .rxd(rxd[3]),
- .rxen(true),
- .divp(50_000_000/115_200), //fclk/baud
- .rdrxd(rdrxd[3]),
- .dat(dat),
- .rxfull(rxfull[3]),
- .rxempty(rxempty[3]),
- .rxhfull(rxhfull[3])
- );
- uart8n1_tx tx(
- .rst(rst),
- .clk(clk),
- .dat(dat),
- .txen(txen),
- .divp(50_000_000/115_200), //fclk/baud
- .txd(txd),
- .txfull(txfull),
- .txempty(txempty),
- .txhfull(txhfull)
- );
- endmodule
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