vhdl 流水灯问题求助

Dionysus

功能没问题 时序有毛刺 效果没有
求各位大神指点


library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity led_change is
port(clk:in std_logic;
     led:out std_logic_vector(7 downto 0)
);
end led_change;

architecture fun of led_change is
signal cnt: integer range 0 to 25000000;
signal flip_led: integer range 0 to 21;

begin
process(clk)
begin
if(clk'event and clk='1')then
        cnt<=cnt+1;
        if(cnt=25000000)then
                flip_led<=flip_led+1;
                cnt <= 0;
        end if;
end if;

case flip_led is
        when 0 =>led<="11111111";
        when 1 =>led<="00000000";
        when 2 =>led<="11111111";
        when 3 =>led<="00000000";
        when 4 =>led<="10000000";
        when 5 =>led<="11000000";
        when 6 =>led<="11100000";
        when 7 =>led<="11110000";
        when 8 =>led<="11111000";
        when 9 =>led<="11111100";
        when 10 =>led<="11111110";
        when 11 =>led<="11111111";
        when 12=>led<="00000001";
        when 13=>led<="00000011";
        when 14 =>led<="00000111";
        when 15=>led<="00001111";
        when 16=>led<="00011111";
        when 17=>led<="00111111";
        when 18=>led<="01111111";
        when 19=>led<="11111111";
        when 20=>led<="00000000";
        when 21=>led<="ZZZZZZZZ";
end case;       

if(flip_led>21)then
                flip_led<=0;
end if;

end process;
end fun;

lcrromi

用软件除毛刺

BBC

上个时序图来看看~~