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发表于 2013-3-6 08:45:58
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gzhuli 发表于 2013-3-2 12:03 
HY57V641620是64Mb = 4M * 16bit的，你到底是要32MB的还是32M * 16bit = 512Mb = 64MB的？
HY的SDRAM是停产 ...
拿了个MT的模型代替，仿真的时候，报错如下，正在研究HY和MT的数据手册，知道什么原因吗？
run 1ms
# Note : Cyclone IV E PLL was reset
# Time: 0 ns Instance: modelsim_test_tb.sdr_test.uut_sysctrl.uut_PLL_ctrl.altpll_component.cycloneiii_pll.pll3
# ** Error: E:/log/13.02.22/232sdram_m2/mt48lc8m16a2.v(892): $hold( posedge Clk:260 ns, Cke:260 ns, 800 ps );
# Time: 260 ns Iteration: 6 Instance: /modelsim_test_tb/mt48lc8m16a2
# ** Error: E:/log/13.02.22/232sdram_m2/mt48lc8m16a2.v(893): $hold( posedge Clk:260 ns, Cs_n:260 ns, 800 ps );
# Time: 260 ns Iteration: 6 Instance: /modelsim_test_tb/mt48lc8m16a2
# Note : Cyclone IV E PLL locked to incoming clock
# Time: 420 ns Instance: modelsim_test_tb.sdr_test.uut_sysctrl.uut_PLL_ctrl.altpll_component.cycloneiii_pll.pll3
# ** Error: E:/log/13.02.22/232sdram_m2/mt48lc8m16a2.v(889): $width( negedge Clk:420 ns, :422187 ps, 2500 ps );
# Time: 422187 ps Iteration: 3 Instance: /modelsim_test_tb/mt48lc8m16a2
# ** Error: E:/log/13.02.22/232sdram_m2/mt48lc8m16a2.v(890): $period( negedge Clk:420 ns, :427187 ps, 7500 ps );
# Time: 427187 ps Iteration: 3 Instance: /modelsim_test_tb/mt48lc8m16a2
# write data: 72
#
# write data: 02
# |
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发表于 2013-3-2 11:45:38
