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//ģ���ģ��洢���л�����ģ��
module wr_rd(vsync,addr_arm,data_arm,ctr_arm,addr_l,data_l,ctr_l,
addr_r,data_r,ctr_r,data,l_r,addr_colum,addr_row,addr_bit,
oe,le);
input [17:0] addr_arm;
input [15:0] data_arm;
input [9:0] addr_colum;
input [3:0] addr_row;
input [2:0] ctr_arm;
input l_r,vsync;
input [2:0] addr_bit;
output [17:0] addr_l,addr_r;
output [2:0] ctr_l,ctr_r;
output oe,le;
inout [15:0] data_l,data_r;
output [15:0] data;
assign data_r =l_r?data_arm:16'bzzzzzzzzzzzzzzzz; //when l_r write ram r,read ram_l
assign addr_r =l_r?addr_arm:{1'b0,addr_bit,addr_row,addr_colum};
assign ctr_r =l_r?ctr_arm:5'b01000;
assign data_l =l_r?16'bzzzzzzzzzzzzzzzz:data_arm; //when !l_r read ram r,write ram_l
assign addr_l =l_r?{1'b0,addr_bit,addr_row,addr_colum}:addr_arm;
assign ctr_l =l_r?5'b01000:ctr_arm;
assign data =l_r?data_l:data_r;
assign oe =vsync?1'b0:1'b1; //rst��373��374 effect
assign le =vsync?1'b1:1'b0; //rst��373��374 effect
endmodule
编译之后，出现错误：
Error (13076): The node "wr_rd:wr_rd1|data[0]" has multiple drivers due to the non-tri-state driver "data_r[0]"
Error (13076): The node "wr_rd:wr_rd1|data[0]" has multiple drivers due to the non-tri-state driver "data_l[0]"
Error (13076): The node "wr_rd:wr_rd1|data[1]" has multiple drivers due to the non-tri-state driver "data_r[1]"
Error (13076): The node "wr_rd:wr_rd1|data[1]" has multiple drivers due to the non-tri-state driver "data_l[1]"
Error (13076): The node "wr_rd:wr_rd1|data[2]" has multiple drivers due to the non-tri-state driver "data_r[2]"
Error (13076): The node "wr_rd:wr_rd1|data[2]" has multiple drivers due to the non-tri-state driver "data_l[2]"
这是怎么回事，我是直接用的别人的例程，应该不会有问题的，怎么会这样？？
小弟初学FPGA，希望各位大牛帮忙看看，谢谢 |
阿莫论坛20周年了！感谢大家的支持与爱护！！
知道什么是神吗？其实神本来也是人，只不过神做了人做不到的事情 所以才成了神。 （头文字D, 杜汶泽）
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发表于 2012-10-15 22:45:13
楼主
