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发表于 2012-5-28 10:28:58
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显示全部楼层
module epm2210_01(
//用于输入的I/O
clk,
rst,
clkin,
numerator, //分子值
denominator, //分母值
//分频器输出
pulse
);
input clk;
input rst;
input clkin;
input [9:0] numerator;
input [9:0] denominator;
output pulse;
reg pulse;
parameter HIGHTIME=10'd2;
wire [9:0] quotient; //商
wire [9:0] remainder; //余数
reg ina;
reg inb;
reg upclk;
reg counter_clkin;
reg [9:0] counter;
reg [9:0] divnum;
reg [9:0] sum;
reg flag;
reg [9:0] counter_pulseh;
wire [9:0] hightime;
assign quotient=(denominator)?numerator/denominator:10'h0;
assign remainder=(denominator)?numerator%denominator:10'h0;
assign hightime={1'b0,quotient[9:1]};
//assign hightime=16'h1;
//save the prior and current state of clkin
always @(posedge clk or negedge rst)
begin
if(!rst)
begin
//numerator<=16'd25;
// denominator<=16'd12;
ina<=0;
inb<=0;
end
else
begin
ina<=clkin;
inb<=ina;
end
end
//check posedge pf clkin
always @(posedge clk or negedge rst)
begin
if(!rst) upclk<=0;
else if(!inb&ina) upclk<=1'b1;
else upclk<=0;
end
//fre div counter
always @(posedge clk or negedge rst)
begin
if(!rst)
begin
counter<=0;
end
else if(counter==divnum) counter<=10'h0;
else if(upclk) counter<=counter+1'b1;
else counter<=counter;
end
always @(posedge clk or negedge rst)
begin
if(!rst)
begin
sum<=0;
flag<=0;
end
else if(counter==divnum)
begin
if((sum+remainder)>=denominator) //分母
begin
sum<=sum+remainder-denominator;
flag<=1;
end
else
begin
sum<=sum+remainder;
flag<=0;
end
end
end
always @(posedge clk or negedge rst)
if(!rst) divnum<=0;
else if(flag) divnum<=quotient+1'b1;
else divnum<=quotient;
//counter_plush
always @(posedge clk or negedge rst)
begin
if(!rst) counter_pulseh<=hightime+10'h1;
else if((counter==divnum)&&divnum) counter_pulseh<=0;
else if(upclk) counter_pulseh<=counter_pulseh+1'b1;
end
//pulse produce
always @(posedge clk or negedge rst)
if(!rst) pulse<=1'b0;
else if(counter_pulseh<=(hightime-1)) pulse<=1'b1;
else pulse<=1'b0;
endmodule |
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