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Error: Cannot synthesize initialized RAM logic "\memproc:mem_data"
Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 1 warning
Error: Peak virtual memory: 186 megabytes
Error: Processing ended: Sat Apr 14 22:48:48 2012
Error: Elapsed time: 00:00:03
Error: Total CPU time (on all processors): 00:00:03
Error: Quartus II Full Compilation was unsuccessful. 3 errors, 1 warning
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
use work.cpu_lib.all;
entity mem is
port(addr : in bit16;
sel,rw : in std_logic;
ready : out std_logic;
data : inout bit16);
end mem;
architecture behave of mem is
begin
memproc : process(addr,sel,rw)
type t_mem is array(0 to 63) of bit16;
variable mem_data: t_mem := --数据块复制
("0010000000000001",
"0000000000010000",
"0010000000000010",
"0000000000110000",
"0010000000000110",
"0000000000101111",
"0000100000001011",
"1000000000011010",
"0011000000001110",
"0000000000000000",
"0011100000000001",
"0011100000000010",
"0010100000001101",
"0000000000000110",
"0000000000000000",
"0000000000000001",
"0000000000000010",
"0000000000000011",
"0000000000000100",
"0000000000000101",
"0000000000000110",
"0000000000000111",
"0000000000001000",
"0000000000001001",
"0000000000001010",
"0000000000001011",
"0000000000001100",
"0000000000001101",
"0000000000001110",
"0000000000001111",
"0000000000010000",
"0000000000000000", --20..3f
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000");
begin
data <="ZZZZZZZZZZZZZZZZ";
ready<='0';
if sel='1' then
if rw='0' then
data <=mem_data(CONV_INTEGER(addr(15 downto 0 ))) after 1 ns;
ready<='1';
elsif rw='1' then
mem_data(CONV_INTEGER(addr(15 downto 0 ))):=data;
end if;
else
data <="ZZZZZZZZZZZZZZZZ" after 1 ns;
end if;
end process;
end behave;
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阿莫论坛20周年了!感谢大家的支持与爱护!!
知道什么是神吗?其实神本来也是人,只不过神做了人做不到的事情 所以才成了神。 (头文字D, 杜汶泽)
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