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http://www.sioi.com.au/shop/product_info.php/cPath/24/products_id/47
Key components
XC6SLX4-3TQG144C
256Mb DRAM 16Mx16 DDR400
4Mb SPI Flash configuration memory (2.7Mb FPGA 1.3Mb user)
62.5 MHz low jitter crystal oscillator
64 way expansion edge connector 1mm pitch 38 user IO (2.5V rail)
Xilinx standard 14 pin JTAG header
User controlled LED
Physical
Dimensions 76mm x 41mm x 16mm
Weight 23g net
Power consumption 160mA @2.5V and 85mA @1.25V typical
Kit contents
FS604 main board
Power regulator USB2V5A800 (plug into a USB port to power unit)
USB cable (power only)
DRAM controller IP core DDR166
Reference design: MicroBlaze + DRAM + UART + GPIO
Compatibility
Compatible with free Xilinx ISE WebPACK software
Compatible with Xilinx ISE, EDK and SDK software
Compatible with Xilinx MicroBlaze soft CPU
线路图在此 http://www.sioi.com.au/download/FS604-FS609.pdf
从线路图看, FPGA 和 DDR 内存之间没有串接电阻, 参考其他线路, 一般有串接电阻.
http://www.ourdev.cn/forum.php?mod=viewthread&tid=4011521
[亮骚] 给OMAP3核心板做了个底板,XC3S50AN+DDR,能推TFT 24位色17、19、22高分大屏
是否一定需要串接电阻呢 ? 串接电阻有什么作用, 请高手解释.
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