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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity gps is
port( clk : in std_logic;
sclk : in std_logic;
sout : out std_logic_vector(7 downto 0);
c1 : out std_logic);
end;
architecture bhc of gps is
signal sclk_a : std_logic := '0';
begin
process(clk,sclk)
variable counter1 : std_logic_vector (7 downto 0):=(others => '0');
variable counter2 : integer := 0;
variable counter3 : integer := 0;
variable counter4 : integer := 0;
variable counter5 : integer := 0;
variable counter6 : integer := 0;
variable counter7 : integer := 0;
variable countern : std_logic_vector (7 downto 0):=(others => '0');
variable counterx : std_logic_vector (7 downto 0):=(others => '0');
variable countery : std_logic_vector (7 downto 0):=(others => '0');
variable counterz : integer := 0;
begin
if clk'event and clk = '1' then
counter1 := counter1 + '1';----jingzhen jishu
sclk_a <= sclk;
if sclk_a = '0' and sclk = '1' then
counter2 := counter2 + 1;
if counter2 = 1 then
counter1 := "00000000";
else
countery := counter1;
counterx := counter1;
end if;
if counterx < "10000000" then
counter3 := counter3 + conv_integer(counterx);---yushu leijia
else
countern := (counterx xor "11111111") + '1';-----qufan jiayi
counter3 := counter3 - conv_integer(countern);
end if;
counter1 := "00000000";
end if;
if counter2 = 61 then----queding 60 ge gps xinhao
counter6 := counter3 / 60;-----mei 60 gps jishu yilunhui qiu pingjun
counter2 := 0;-----xiayige lunhui qinglin zhunbei
counter3 := 0;-----tongshang
end if;
end if;
if counter2 <= 60 then
if counter6 >0 then
counter7 := counter6 + 128;
sout <= conv_std_logic_vector(counter7,8);
else counter7 := counter6 + 128;
sout <= conv_std_logic_vector(counter7,8);
end if;
end if;
end process;
end bhc;
编译的时候显示占用800+logic elements |
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