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楼主 |
发表于 2011-4-12 09:38:47
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回复【楼主位】matrx2010
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这是从网上找的完整代码,其中空满标志位的判断有些看不懂
module fifo_asyn(rdata,
wfull,
rempty,
wdata,
winc, //写使能的作用
wclk,
w_rst,
rinc, // 读使能的作用
rclk,
r_rst);
parameter DSIZE = 8;
parameter ASIZE = 4;
output [DSIZE-1:0] rdata; //width [7:0]
output wfull;
output rempty;
input [DSIZE-1:0] wdata; //width[7:0]
input winc, wclk, w_rst;
input rinc, rclk, r_rst;
reg [DSIZE-1:0] rdata;
reg wfull,rempty;
reg [ASIZE:0] wptr, rptr, w2_rptr, r2_wptr, w1_rptr,r1_wptr;// [4:0]
reg [ASIZE:0] rbin, wbin;
reg [DSIZE-1:0] mem[0:(1<<DSIZE)-1]; //DEEPTH 0~15
wire [ASIZE-1:0] waddr, raddr; //[3:0]
wire [ASIZE:0] rgnext, rbnext,wgnext,wbnext;
wire rempty_val,wfull_val;
//双口RAM存储器
always@(posedge rclk)
if (rinc && !rempty)
rdata=mem[raddr]; //waddr,raddr 范围 0~15
always@(posedge wclk)
if (winc && !wfull)
mem[waddr] <= wdata; //waddr,raddr 范围 0~15
//raddr产生
always @(posedge rclk or negedge r_rst) // GRAYSTYLE2 pointer
if (!r_rst)
{rbin, rptr} <= 0;
else
{rbin, rptr} <= {rbnext, rgnext};
//同步wptr指针
always @(posedge rclk or negedge r_rst)
if (!r_rst)
{r2_wptr,r1_wptr} <= 0;
else
{r2_wptr,r1_wptr} <= {r1_wptr,wptr};
// Memory read-address pointer (okay to use binary to address memory)
assign raddr = rbin[ASIZE-1:0];
assign rbnext = !rempty ? (rbin + rinc) : rbin;
assign rgnext = (rbnext>>1) ^ rbnext; //binary-to-gray conversion
// FIFO empty when the next rptr == synchronized wptr or on reset
//rempty产生
assign rempty_val = (rgnext == r2_wptr);
always @(posedge rclk or negedge r_rst) begin
if (!r_rst)
rempty <= 1'b1;
else
rempty <= rempty_val;
end
//wfull产生与waddr产生
always @(posedge wclk or negedge w_rst) // GRAYSTYLE2 pointer
if (!w_rst)
{wbin, wptr} <= 0; //width[5:0]
else
{wbin, wptr} <= {wbnext, wgnext};
//同步rptr 指针
always @(posedge wclk or negedge w_rst)
if (!w_rst)
{w2_rptr,w1_rptr} <= 0;
else
{w2_rptr,w1_rptr} <= {w1_rptr,rptr}; //width[4:0]
// Memory write-address pointer (okay to use binary to address memory)
assign waddr = wbin[ASIZE-1:0]; //waddr width[3:0]
assign wbnext = !wfull ? (wbin + winc) : wbin;
assign wgnext = (wbnext>>1) ^ wbnext; // binary-to-gray conversion
assign wfull_val = (wgnext=={~w2_rptr[ASIZE:ASIZE-1], w2_rptr[ASIZE-2:0]});//不明白
always @(posedge wclk or negedge w_rst)
if (!w_rst)
wfull <= 1'b0;
else
wfull <= wfull_val;
endmodule |
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