VHDL设计的PS2键盘程序，谁能帮我看下

ii8844

谁能帮我解释下这个PS2接口程序，还有就是仿真我看不懂，懂的高手可以加我QQ14213809指导下，感激不尽！
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ps2 is
    Port ( clk: in std_logic;
       ps2clk: in std_logic;
       ps2data: in std_logic;
       reset: in std_logic;
       result: out std_logic_vector(7 downto 0));
end ps2;

architecture Behavioral of ps2 is
signal ps2clk_r : std_logic_vector(2 downto 0);
signal ps2clkfall : std_logic;
signal q : std_logic_vector(11 downto 0);
signal ps2serialdata : std_logic_vector(10 downto 0) ;
begin

process(clk,reset)
begin
if reset='0' then
  ps2clk_r <= "000";
  elsif rising_edge(clk) then
     ps2clk_r(2) <= ps2clk_r(1);
  ps2clk_r(1) <= ps2clk_r(0);
  ps2clk_r(0) <= ps2clk;
end if;
end process;

ps2clkfall<='1' when ps2clk_r="110" else '0';

process(clk)
begin
if rising_edge(clk) then
  if reset='0' then q <= (others =>'0');
   elsif ps2clkfall='1' then
    if q(0)='0' then
     q <= ps2data & "01111111111";
    else
     q <= ps2data & q(11 downto 1);
            end if;
        end if;
    end if;
end process;

process(q)
begin
if q(0) = '0' then
  ps2serialdata <= q(11 downto 1);
  result <=ps2serialdata(8 downto 1);
else
  result <="11111111";
end if;
end process;
end Behavioral;
谁能帮我解释下，还有就是仿真我看不懂，懂的高手可以加我QQ14213809指导下，感激不尽！