关于FPGA内部三态门等效转换的问题

coolxjm

Hi,

I had some question regarding the warning message below:

Warning: Tri-state node (s) do not directly drive top-level pin(s)
è Warning: Converted the fan-out from the tri-state buffer “tribuf” to the node “comb” into an OR gate

When I find the help message it state:
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Tri-state node(s) do not directly drive top-level pin(s)

CAUSE: The design contains tri-state nodes that drive non-tri-state logic, but the chip does not support internal tri-states. As a result, the Quartus II software converts all the tri-state nodes feeding internal logic to an equivalent logic.
For example, in the following design, the fan-out from the node tribuf to the AND gate is converted to an OR gate.
module test1 (input oe1, data1, in, output out, inout bidir);
wire tribuf, tmp;
assign tribuf = oe1 ? data1 : 1'bz;
and(tmp, in, tribuf);
assign bidir = tribuf;
assign out = tmp;
endmodule

ACTION: Avoid this warning by either removing the non-tri-state fan-outs of the affected tri-state nodes or replacing the tri-state nodes with non-tri-state logic.

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如上在altera form中这位哥们所述，帖子链接是：http://www.alteraforum.com/forum/showthread.php?p=87342
我碰到的也是一样的问题，就是不大理解所谓的“the Quartus II software converts all the tri-state nodes feeding internal logic to an equivalent logic”是何意思，既然内部不支持三态（我的理解是不支持高阻态），而且（not OE）+input=output这种等效又不成立，那quartus所谓的等效逻辑到底是什么样的呢？期待大侠解答，苦瓜先行谢过。

coolxjm

沙花，等解答，琢磨好几天没出结果了

ssaweee

去官方网站咨询吧

NJ8888

对于内部三态，是靠多路选择器来代替的

taishan

我也碰上了。多路选择器要耗费资源啊，就让它线或不知道行不行。

NJ8888

回复【4楼】taishan
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目前我看的资料不支持内部线或