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most software PWM generation methods rely on counting the cycle and then decide if a bit needs to be turned on. This approach, when implemented efficiently, can be fairly fast, but its efficiency goes down as the number of independent pwm channels go up. For example, on a 12F675 running at 4Mhz, the fastest 4-ch 256-bit pwm generation is about 3.5ms, per cycle. The issue there is that at each increment of the cycle counter, you have to compare a pwm's pre-determined duty cycle with the cycle counter to decide if a pwm channel should be turned on (or off). each test takes 3 instruction cycles so if you have 4 channels, that's 12 instruction cycles + a few for the overhead, and you are talking about ~15 instruction cycles per cycle count. for a 256-bit pwm, that's a total of 256*15=4000 instruction cycles. or about 4ms on a 4Mhz pic.
obviously, if you need to generate more channels, the cycle time goes up exponentially and making that approach unacceptible for multi-channel output.
the following is a different approach that aims to minimize the cycle time. Rather than testing each cycle count, this approach tests each channel exponentially and produces exponential delays.
so for 256-bit pwm, it makes just 8 comparison per channel, vs. the 256 comparison per channel of the old method.
the result is greatly improved speed. |
阿莫论坛20周年了!感谢大家的支持与爱护!!
曾经有一段真挚的爱情摆在我的面前,我没有珍惜,现在想起来,还好我没有珍惜……
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