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最近某个产品要用好几块XILINX ML555评估板,因此我给它小批量了(山寨了)。有感兴趣的没有?
看到生产部门的人很辛苦,给他们推销推销。。。这个东西可先参考XILINX报价,非诚勿扰
http://www.xilinx.com/products/devkits/HW-V5-ML555-G.htm
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The Virtex?-5 LXT FPGA Development kit for PCI-Express supports PCIe/PCI-X/PCI. This complete development kit passed PCI-SIG compliance for PCI Express v1.1 and enables you to rapidly create and evaluate designs using PCI Express, PCI-X and PCI interfaces.
What's Included
Virtex-5 ML555 board (XC5VLX50T-1FF1136 FPGA)
Platform USB programming cable
Xilinx Tools and Design Resources
- ISE Evaluation Software
- Resource CD (Reference Designs, Labs, Demonstrations)
Getting Started
- Quick Start Guide
- PCIe Customer Class information
- Xilinx Productivity Advantage document
Reference Designs, IP, and Software
Key Features
Virtex-5 LXT XC5VLX50T-1FF1136 FPGA
Serial Connectivity:
- PCIe: 8-lane add-in card connector
- SFP: 2 transceiver module ports (SFP modules not included)
- SATA: 1 Serial ATA disk drive interface connector (SATA cable not included)
- SMA: 1 SMA port for off-board GTP transceiver connectivity
- USB: 1 USB 2.0 port (USB interface cable not included)
Parallel Connectivity:
- PCI / PCI-X: 64-bit 3.3V add-in card connector
- LVDS: 2 SAMTEC LVDS interface connectors with up to 24 high-speed channels each
Additional Connectivity:
- Xilinx Generic Interface (XGI) headers support installation of Xilinx Ethernet PHY daughter card (sold separately) for 10/100/1000 Mb Ethernet connectivity
Memory Resources:
- 200-pin 1.8V SODIMM socket with 256 MB (32M x 64 bit) DDR2 SDRAM
Device Configuration
- Static or dynamic device reconfiguration support with the XC2C32 CoolRunner?-II CPLD
- Device configuration through on-board Platform Flash, or download using Xilinx Platform Cable USB
Xilinx LogiCORE? IP supported:
- PCI Express endpoint designs in X1, X2, X4, and X8 configurations
- PCI-X 64b @ 66/100/133 MHz
- PCI 32b @ 33/66 MHz, 64b @ 33 MHz
Clocking:
- Three on-board clock sources, two differential SMA clock inputs
- Two programmable clock synthesizer chips to support DDR2 memory interfaces, 10/100/1000 Mb Ethernet protocols, SATA, Fibre Channel, Aurora, and other serial GTP baud rates
- PCI clocking support for global and regional clocking applications
Misc:
- User pushbutton switches and LEDs
- On-board power regulators (3.0V PCI, 2.5V, 1.8V, 1.0V, 0.9V VTT)
资料:
点击此处下载 ourdev_498800.pdf(文件大小:2.94M) (原文件名:ug201.pdf)
点击此处下载 ourdev_498801.pdf(文件大小:1.21M) (原文件名:ML555R1_Schematics.pdf) |
阿莫论坛20周年了!感谢大家的支持与爱护!!
曾经有一段真挚的爱情摆在我的面前,我没有珍惜,现在想起来,还好我没有珍惜……
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