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发表于 2009-10-24 18:44:00
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用周生生的EZFPGA030+光耦+MOSFET驱动起来了，初步试验了一下，5V电压，无零点检测和过流保护。
贴下VHDL代码：
// bldc.v
module BLDC(
clk,
reset,
Q,
dir
);
input clk;
input reset;
input dir;
output [5:0] Q;
reg [5:0] Q;
reg [23:0] count;
reg [5:0] state;
reg [23:0] count2;
reg [0:0] count3;
parameter A=6'b000001 , B=6'b000010 , C=6'b000100 , D=6'b001000 , E=6'b010000 , F=6'b100000;
always @ (posedge clk or negedge reset)
begin
if(!reset)
begin
state = A;
Q = 12'h00;
count = 24'h0;
count2 =24'h40000;
count3 = 1'b1;
end
else
begin
count=count+1;
case(state)
A:
begin
if(count==count2)
begin
state=B;
Q=6'b100100;
count = 24'h0;
end
end
B:
begin
if(count==count2)
begin
state=C;
Q=6'b100001;
count = 24'h0;
end
end
C:
begin
if(count==count2)
begin
state=D;
Q=6'b001001;
count = 24'h0;
end
end
D:
begin
if(count==count2)
begin
state=E;
Q=6'b011000;
count = 24'h0;
end
end
E:
begin
if(count==count2)
begin
state=F;
Q=6'b010010;
count = 24'h0;
end
end
F:
begin
if(count==count2)
begin
state=A;
Q=6'b000110;
count = 24'h0;
end
end
endcase
end
end
endmodule
光耦口的波形：
(原文件名:1.jpg) |
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