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发表于 2011-4-7 08:02:48
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"我想问问是我晶振的精度不够还是没有加电容的原因啊"
that's correct. the load capacitance usually is specified in the datasheet, and typically around 12.5pf for older chips and 7pf for newer chips. most cmos chips have a pin capacitance of about 3pf so you will be ok if your chip / crystal requires 7pf of load capacitance, and substantially faster if it does 12.5pf.
you will also notice substantially higher jitter without a capacitor there.
as usually, always read the @#%$#@%@# datasheet. or you get #$%uked. |
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