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QUARTUS II版本:13.0
FPGA型号:EP2C8Q208
在编译的过程中出现了如下的警告:
(1)Critical Warning (332012): Synopsys Design Constraints File file not found: 'exp08_demo.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
Critical Warning (332012): Synopsys Design Constraints File file not found: 'exp08_demo.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
Critical Warning (332148): Timing requirements not met
Critical Warning (332148): Timing requirements not met
(2)Warning (306006): Found 4 output pins without output pin load capacitance assignment
Info (306007): Pin "Data_Out[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info (306007): Pin "Data_Out[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info (306007): Pin "Data_Out[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info (306007): Pin "Data_Out[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
程序是黑金开发板提供的程序:PS2解码 ,仔细检查了下,程序没有问题。
求助大侠,有没有什么好的方法来解决上述两个问题。。。谢谢 |
阿莫论坛20周年了!感谢大家的支持与爱护!!
曾经有一段真挚的爱情摆在我的面前,我没有珍惜,现在想起来,还好我没有珍惜……
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