求教33欧姆阻抗匹配的问题，谢谢！
大家好，想向论坛的朋友请教个问题，就是关于原理图中33欧姆的问题，我们会在原理图上面看到很多时候会有33欧姆电阻，如下图所示：这个图上有两个33欧姆电阻，我的疑问是：如果在生产pcb的时候要求生产做好50欧姆的阻抗匹配的话，还需要加这个33欧姆的电阻吗，
我的理解是：pcb生产过程中已经做了50欧姆阻抗匹配，就不需要加这个33欧姆了吧，否则50+33，是不是阻抗就变大了呢？
希望论坛里的技术大佬给指点一下，谢谢啦！ 我觉得可能是因为fpga输出阻抗不是50 这跟 pcb 阻抗匹配没关系
串电阻的目的是为了降低发送出去的信号的最高频率
理想的方波，哪怕只有 1Hz，只要它跳变边沿足够陡，它发射出去的频率就可以达到无穷大 这个是终端匹配电阻，输出端低内阻，另一端输入高内阻，都和PCB传输线阻抗不匹配，要么在输出端串联终结电阻，要么在输入端并联终结电阻，和PCB传输线阻抗匹配了才能消除反射信号。 Summary:
series termination: first halved at the source, doubled (total reflection) at receiver end, must one-to-one
end termination: first doubled at the source (source imp << line imp), then halved at the receiver, this config supports multiple drop
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Consider the voltage on the transmission line.
The instant the transmitter transitions, it sends a current into the line.The current is set by the source termination resistor, and the line impedance.Let's say both are 100 ohms.
Thus, at the transmitter port, we have a voltage divider, say it's transitioning from 0 to 3.3V, then the pin voltage (assuming an ideal transmitter; it's not, but we can lump in its internal resistance with the source termination resistor, so this is fine) goes from 0 to 1.65V, and that 1.65V wavefront propagates down the line.
Some time later, a lone device at the far end, receives the 1.65V wavefront.The line is open (unterminated) at this end, so the wave reflects in phase, and at nearly full amplitude.At the end, the wave doubles up on itself and a clean 3.3V is received.Later, the wave returns to the source, adding its 1.65V level to the initial 1.65V level, setting the full line to 3.3V.
In effect, the transmitter tried to set the line to 3.3V, and at the speed of light (in the medium), that event is communicated over the length of the line.The transmitter must deliver current during this transition, to drive that event.It's not for free of course, there's energy stored in the line.
In practice, there is some loss and phase shift due to the transmission line itself, and the receiver pin capacitance.They act to round off the edge, or cause a little ringing.Likewise, the source end won't be perfectly terminated, so a little wave will reflect back off it, and so on and so forth; but as long as the double reflection is small (say, less than 20%), we aren't very interested in it.(Why 20%?This is about how much range a CMOS receiver considers a "valid" logic level.)
Now add a receiver midway along the line.What does it see?First nothing, then 1.65V, then 3.3V -- an indeterminate level is read for the duration of twice the distance to the far (unterminated) end.This perfectly describes the failure you observed, which is fortunate I guess, in that it failed exactly as one should expect!
Also, note that, if the line is longer than the pulse width being driven into it, then the transmitted and reflected wavefronts will both be in transit at the same time -- even stranger combinations (i.e. runt pulses) appear midway along the line.
If we load or double terminate the line instead, then the transmitter drives 3.3V into the line, and either 1.65V (source terminated) or 3.3V (unterminated) launches down the line, and at the far end, the wavefront is simply absorbed, leaving 1.65 or 3.3V along the line.There is no double-time penalty for a reflected wave.Likewise, any receiver placed midway along the line, sees the same single wavefront -- and there is no problem with multiple wavefronts travelling on the line at the same time, so long as they're synchronized in time and direction. 这个电阻可以降低反射 看有的原厂说，没必要加这个电阻 本帖最后由 hecat 于 2023-4-5 11:59 编辑
推荐你看<High-speed Digital Design - Johnson & Grahamn>这本书，书中第六章对这个问题有详细的讲解。
这本书算是高速数字设计的宝典，建议买一本纸质的，全新或二手的都行，不伤眼睛。
hecat 发表于 2023-4-5 11:52
推荐你看这本书，书中第六章对这个问题有详细的讲解。
这本书算是高速数字设计的宝典，建议买一本纸质的， ...
(引用自8楼)
一本好书，解释的很到位 本帖最后由 zjykwym 于 2023-4-7 17:01 编辑
一般这个是匹配芯片内部，内部17+外部33=50 zjykwym 发表于 2023-4-7 12:37
一般这个是匹配芯片内部，内部27+外部33=50
(引用自10楼)
这个60了。。。。 z123 发表于 2023-4-7 14:28
这个60了。。。。
(引用自11楼)
数学不好，哈哈，改了。 zjykwym 发表于 2023-4-7 17:02
数学不好，哈哈，改了。
(引用自12楼)
那请问老哥，我看好多也是用22R电阻，而不是33R的，到底是哪个好呀？
z123 发表于 2023-4-7 19:35
那请问老哥，我看好多也是用22R电阻，而不是33R的，到底是哪个好呀？
(引用自13楼)
不要那么纠结，都可以。没那么高要求 z123 发表于 2023-4-7 19:35
那请问老哥，我看好多也是用22R电阻，而不是33R的，到底是哪个好呀？
(引用自13楼)
参考设计用多少你也用多少。
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