如何解决vivado2020.1打包IP时出现的警告？
我在打包IP时出现了以下警告, 能问一下这些警告是怎么产生的吗以及哪些是可以忽略的，另外当自定义IP中需要引用Xilinx ip时，在 "Synthesis Options" 中是选择"Global" 还是"Out of Context per IP"，（是不是网表文件不能嵌套使用）General Messages Project source file 'd:/xilinx_project/EIT/ip_repo/SAMPLE_EIT_1.0/component.xml' ignored by IP packager.
IP PackagerPorts and Interfaces Wizard Bus Interface 'adc_rst_n': Bus parameter POLARITY is ACTIVE_LOW but port 'adc_rst_n' is not *resetn - please double check the POLARITY setting.
Bus Interface 'ad_clk' does not have any bus interfaces associated with it.
Bus Interface 'da_clk' does not have any bus interfaces associated with it.
Bus Interface 'clk_in1' does not have any bus interfaces associated with it.
Bus Interface 'clk_10m' does not have any bus interfaces associated with it.
Bus Interface 'ad_clk': FREQ_HZ bus parameter is missing for output clock interface.
Bus Interface 'da_clk': FREQ_HZ bus parameter is missing for output clock interface.
Bus Interface 'clk_10m': FREQ_HZ bus parameter is missing for output clock interface.
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