Strangers 发表于 2018-9-15 18:34:53

求助,谁有AERO®II TRANSCEIVER DESIGN GUIDE这份资料

最近看见节选自AERO®II TRANSCEIVER DESIGN GUIDE中一句关于晶振走线挖地的描述;哪位兄弟有这份完整资料?       
“3.2.1. DCXO Crystal PCB LayoutThe crystal should be placed close to the IC and notnear the power amplifier. The ground plane shouldalso be removed to at least 250 μm below the crystalto minimize the stray loading capacitance of thedevice pads. Use the crystal vendor\'srecommended PCB footprint. Figure 7 illustratesthe recommended PCB layout."

3DA502 发表于 2018-9-15 20:17:02

说的都对

锦上添花
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