FPGA读取ov7620摄像头问题
因为用的单片机主频50M, 与ov7620数据更新速率差不多, 想用FPGA做个buffer。
但是编译的时候提示:
Error (276003): Cannot convert all sets of registers into RAM megafunctions when creating nodes. The resulting number of registers remaining in design exceeds the number of registers in the device or the number specified by the assignment max_number_of_registers_from_uninferred_rams. This can cause longer compilation time or result in insufficient memory to complete Analysis and Synthesis
大意是不能把左右寄存器映射到RAM中。
我的代码主要思路是分成两部分, 写入和读取, 把任意部分注释掉都能正常编译。
读摄像头是在PCLK每次上升沿读8位并口数据,存入img寄存器。
单片机读取是MCUsignal高的时候(单片机给出),把新数据放到输出口。
后来发现, 把输出数据那句话, _CameraOutput = img_r[(out_line*320+out_column)]; 注释掉, 也能通过编译。
代码如下, 请问谁能解释一下是什么问题啊
module Camera(
input clk50M,
input rst_n,
output reg test_signal,
//input part
input VSYN,
input HREF,
input PCLK,
input CameraInput,
//output part
output CameraOutput,
input MCUSignal,
input MCUrst);
reg count;
wire clk100M;
PLL m1(
.inclk0(clk50M),
.c0(clk100M));
//test part test_signal is 5MHz
always @(posedge clk100M)
begin
if(!rst_n) count <= 8'h00;
else if(count == 8'd9)
begin
count = 8'd00;
test_signal <= test_signal^1'b1;
end
else count <= count + 1;
end
//***************input part***************
reg line;
reg column;
reg img;
reg line_changed;
reg column_changed;
always @(posedge clk100M)
begin
if(!rst_n) //reset
begin
line = 0;
column = 0;
line_changed = 0;
column_changed = 0;
end
else if(VSYN) //VSYNt= 1 reset
begin
line = 16'b0;
column = 16'b0;
end
else if(!HREF) //HREF = 0 change line
begin
if(!line_changed) //line hasn't been changed
begin
line = line + 1;
line_changed <= 1;
end
end
else //HREF = 1 change line next time
begin
line_changed <= 0;
if(PCLK) //PCLK = 1 read data
begin
if(line == 0)
begin
img[(line*320+column)] = CameraInput;
end
if(!column_changed) //column hasn't been changed
begin
column = column + 1;
column_changed <= 1;
end
end
else //PCLK=0 change column next time
begin
column_changed <= 0;
end
end
end
//********************output part********************
reg out_line;
reg out_column;
reg _CameraOutput;
assign CameraOutput = _CameraOutput;
reg data_transferred;
reg img_r;
always @(posedge clk100M)
begin
if(!MCUrst)
begin
out_line = 0;
out_column =0;
data_transferred = 0;
end
else if(MCUSignal) //signal is high, transfer data
begin
if(!data_transferred)
begin
if(!out_line)
begin
_CameraOutput = img_r[(out_line*320+out_column)];
end
out_column = out_column + 1;
if(out_column >= 640)
begin
out_line = out_line + 2;
out_column = 0;
end
if(out_line >= 240)
begin
out_line = 0;
end
data_transferred <= 1;
end
end
else //MCUrst = 0 , transfer next time
begin
img_r[(out_line*320+out_column)] <= img[(out_line*320+out_column)];
data_transferred <= 0;
end
end
endmodule
用的ram数量超过芯片容量,换个大点容量的片子试试 ctqvsly 发表于 2014-7-24 07:32
用的ram数量超过芯片容量,换个大点容量的片子试试
那句话只是读取ram里面的值, 并不占用资源啊
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