分析一段SDRAM的初始化状态机代码，有些不明白的地方请教
always @(posedge iSYS_CLK or posedge iFIFO_RESET)begin
if (iFIFO_RESET)
begin
iState <= 4'b0000;
end
else
begin
case (iState)
4'b0000:
if (sys_DLY_100US) iState <= 4'b0001;
4'b0001:
iState <= ((15/12) == 0) ? 4'b0011 : 4'b0010;
4'b0010:
if (clkCNT == (15/12)) iState <= 4'b0011;
4'b0011:
iState <= ((66/12) == 0) ? 4'b0101 : 4'b0100;
4'b0100:
if (clkCNT == (66/12)) iState <= 4'b0101;
4'b0101:
iState <= ((66/12) == 0) ? 4'b0111 : 4'b0110;
4'b0110:
if (clkCNT == (66/12)) iState <= 4'b0111;
4'b0111:
iState <= (2 == 0) ? 4'b1001 : 4'b1000;
4'b1000:
if (clkCNT == 2) iState <= 4'b1001;
4'b1001:
iState <= 4'b1001;
default:
iState <= 4'b0000;
endcase
end
end
请问上面15/12==0,66/12==0,2==0有什么含义？
iState <= ((15/12) == 0) ? 4'b0011 : 4'b0010为什么不直接写成iState<=4'b0011 ?
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