fpga i2c驱动问题
先附上程序：module i2cinout(clk,res,func,adress,data,slaveadress,enflag,scl,sda,recive,endflag);
input func,enflag,clk,res;
input adress,data,slaveadress;
output reg scl,endflag;
output reg recive;
inout sda;
reg state;
reg i;
reg sdalink,sdadata;
assign sda=sdalink?sdadata:1'bz;
always @(posedge clk)begin
if(res==0)begin
state<=1;
state<=1;
endflag<=0;
recive<=0;
i<=0;
sdalink<=1;
end
else if(enflag==0)begin
endflag<=0;
state<=1;
end
else if(func==0)begin
case(state)
0:begin
endflag<=1;
end
1:start;
2:sendbyte(slaveadress);
3:sendbyte(adress);
4:sendbyte(data);
5:stop;
6:state<=0;
endcase
end
else if(func==1)begin
case(state)
0:begin
endflag<=1;
end
1:start;
2:sendbyte(slaveadress);
3:sendbyte(adress);
4:start;
5:sendbyte(slaveadress+1);
6:recivebyte;
7:sendack(1);
8:stop;
9:state<=0;
endcase
end
end
task start;
case(state)
1:begin
scl<=1'bz;
sdadata<=1'bz;
state<=state+1;
end
2:begin
sdadata<=0;
state<=state+1;
end
3:begin
scl<=0;
state<=1;
state<=state+1;
end
endcase
endtask
task stop;
case(state)
1:begin
sdadata<=0;
scl<=1'bz;
state<=state+1;
end
2:begin
sdadata<=1'bz;
state<=1;
state<=state+1;
end
endcase
endtask
task sendack;
input ack;
case(state)
1:begin
if(ack) begin
sdadata<=1'bz;
end
else begin
sdadata<=0;
end
scl<=1'bz;
state<=state+1;
end
2:begin
scl<=0;
state<=1;
state<=state+1;
end
endcase
endtask
task sendbyte;
input datain;
case(state)
1:begin
if(i<8)begin
if((datain<<i)&8'h80)begin
sdadata<=1'bz;
end
else begin
sdadata<=0;
end
scl<=1'bz;
state<=state+1;
end
else begin
i<=0;
state<=state+2;
end
end
2:begin
scl<=0;
i<=i+1;
state<=state-1;
end
3:begin
sdalink<=0;
scl<=1'bz;
state<=state+1;
end
4:begin
//recive<=sda;
scl<=0;
state<=state+1;
end
5:begin
sdalink<=1;
state<=1;
state<=state+1;
end
endcase
endtask
task recivebyte;
case(state)
1:begin
sdadata<=1'bz;
sdalink<=0;
state<=state+1;
end
2:begin
if(i<8)begin
recive<=(recive<<1);
scl<=1'bz;
state<=state+1;
end
else begin
i<=0;
state<=state+2;
end
end
3:begin
recive<=recive+sda;
i<=i+1;
scl<=0;
state<=state-1;
end
4:begin
sdalink<=1;
state<=1;
state<=state+1;
end
endcase
endtask
endmodule
说明：
func=0的时候是写i2c，=1的时候是读
enflag是使能的标志，是1的时候才运行。
endflag=1的时候表示运行完成
recive是读到的数据。
请问哪里有问题啊，为什么我读出来的数据全是11111111呢？（也就是sda一直是高电平）
我连的是mpu6050
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