写了一个IIC写读24C08的程序，怎么也弄不出来 (amobbs.com 阿莫电子技术论坛) -

YL043_2011 发表于 2012-4-26 16:25:52

写了一个IIC写读24C08的程序，怎么也弄不出来

程序有错误，求高人指\(^o^)/~
------------------------------------------------------------------
-- 写数据到AT24C08，在读取显示到数码管。
------------------------------------------------------------------
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY IIC IS
GENERIC(clkcnt : INTEGER:=50);--时钟源分频
PORT(
reset,clk: IN    STD_LOGIC;
scl    : INOUT    STD_LOGIC;
en       : OUT    STD_LOGIC_VECTOR(3 DOWNTO 0);--数码管位选
led_data : OUT    STD_LOGIC_VECTOR(7 DOWNTO 0);--数码管段选
sda    : INOUT STD_LOGIC
);
END ENTITY IIC;
ARCHITECTURE ART OF IIC IS
------------------------------------------------------
TYPE STATE_1 IS(start,transmit,ack,sub,ack1,start1,slave,ack2,reading,ack3,stop);
SIGNAL STATE : STATE_1;
SIGNAL bclk : STD_LOGIC;
SIGNAL t_data: STD_LOGIC_VECTOR(7 DOWNTO 0):="10101010";--准备发送的数据
SIGNAL r_data: STD_LOGIC_VECTOR(7 DOWNTO 0);--读取到的数据寄存器
------------------------------------------------------
BEGIN
-----------------------------------------------------------

en<="0000";

------------400KHz--IIC---------40MHz时钟源----------------
FenPin:PROCESS(clk,reset)
VARIABLE cnt : INTEGER:=0;
BEGIN
IF(reset='0')THEN
cnt:=0;
ELSIF(clk'EVENT AND clk='1')THEN
IF(cnt=clkcnt-1)THEN
cnt:=0;
bclk<=NOT bclk;
ELSE
cnt:=cnt+1;
END IF;
END IF;
END PROCESS FenPin;
-----------------------写数据到AT24C08---------------------------
main:PROCESS(bclk,reset)
VARIABLE x_address: STD_LOGIC_VECTOR(7 DOWNTO 0):="10100000";
VARIABLE d_address: STD_LOGIC_VECTOR(7 DOWNTO 0):="10100001";
VARIABLE count    : INTEGER RANGE 0 TO 40;
VARIABLE cnt    : INTEGER RANGE 0 TO 7;
BEGIN
IF(reset='0')THEN
scl<='1';
sda<='1';
count:=0;
cnt:=7;
STATE<=start;
ELSIF(bclk'EVENT AND bclk='1')THEN
CASE STATE IS
WHEN start=>
count:=count+1;
CASE count IS
WHEN 1 => SDA<='1';
WHEN 2 => SCL<='1';
WHEN 5 => SDA<='0';
WHEN 7 => SCL<='0';
WHEN 15=> count:=0;
   STATE<=transmit;
               WHEN OTHERS=> NULL;
END CASE;
WHEN transmit=>
count:=count+1;
CASE count IS
WHEN 1=> SDA<=x_address(cnt);
WHEN 2=> SCL<='1';
WHEN 3=> SCL<='0';
WHEN 4=> cnt:=cnt-1;
count:=0;
IF(cnt=0)THEN
cnt:=7;
STATE<=ack;
ELSE
STATE<=transmit;
END IF;
WHEN OTHERS=>NULL;
END CASE;
WHEN ack =>
count:=count+1;
CASE count IS
WHEN 1=> SDA<='0';
WHEN 2=> SCL<='1';
WHEN 3=> SCL<='0';
WHEN 4=> STATE<=sub;
count:=0;
WHEN OTHERS=>NULL;
END CASE;
WHEN sub =>
count:=count+1;
CASE count IS
WHEN 1=> SDA<=t_data(cnt);
WHEN 2=> SCL<='1';
WHEN 3=> SCL<='0';
WHEN 4=> cnt:=cnt-1;
count:=0;
IF(cnt=0)THEN
cnt:=7;
STATE<=ack1;
ELSE
STATE<=sub;
END IF;
WHEN OTHERS=>NULL;
END CASE;
WHEN ack1 =>
count:=count+1;
CASE count IS
WHEN 1=> SDA<='0';
WHEN 2=> SCL<='1';
WHEN 3=> SCL<='0';
WHEN 4=> STATE<=start1;
count:=0;
WHEN OTHERS=>NULL;
END CASE;
WHEN start1 =>
count:=count+1;
CASE count IS
WHEN 1 => SDA<='1';
WHEN 2 => SCL<='1';
WHEN 3 => SDA<='0';
WHEN 4 => SCL<='0';
WHEN 5=>count:=0;
   STATE<=slave;
               WHEN OTHERS=> NULL;
END CASE;
WHEN slave =>
count:=count+1;
CASE count IS
WHEN 1 => SDA<=d_address(cnt) ;
WHEN 2 => SCL<='1';
WHEN 3 => SCL<='0';
WHEN 4 => SCL<='0';
WHEN 5=>count:=0;
   STATE<=slave;
               WHEN OTHERS=> NULL;
END CASE;
WHEN ack2 =>
count:=count+1;
CASE count IS
WHEN 1=> SDA<='0';
WHEN 2=> SCL<='1';
WHEN 3=> SCL<='0';
WHEN 4=> STATE<=reading;
count:=0;
WHEN OTHERS=>NULL;
END CASE;
WHEN reading =>
count:=count+1;
CASE count IS
WHEN 1 => SDA<='1';
WHEN 4 => SCL<='1';
WHEN 8 => r_data(cnt)<=sda;
WHEN 10=> SCL<='0';
WHEN 12=> cnt:=cnt-1;
   count:=0;
   IF(cnt=0)THEN
cnt:=7;
STATE<=ack3;
   ELSE
STATE<=reading;
   END IF;
WHEN OTHERS=>NULL;
END CASE;
WHEN ack3 =>
count:=count+1;
CASE count IS
WHEN 1=> SDA<='0';
WHEN 2=> SCL<='1';
WHEN 3=> SCL<='0';
WHEN 4=> STATE<=stop;
count:=0;
WHEN OTHERS=>NULL;
END CASE;
WHEN stop =>
count:=count+1;
CASE count IS
WHEN 1=> SDA<='0';
WHEN 3=> SCL<='1';
WHEN 5=> SDA<='1';
WHEN 7=> STATE<=start;
count:=0;
WHEN OTHERS=>NULL;
END CASE;
WHEN OTHERS=> STATE<=start;
END CASE;
led_data<=r_data;
END IF;
END PROCESS main;
END ARCHITECTURE ART;

无级电工 发表于 2012-4-26 16:36:14

一下愣住了：这是什么语言？似曾相识，恍惹隔世。

loveraul 发表于 2012-4-26 16:38:39

VHDL吗？

YL043_2011 发表于 2012-4-26 16:39:22

是的 vhdl

wangshaosh123 发表于 2012-4-26 17:23:36

本帖最后由 wangshaosh123 于 2012-4-26 17:28 编辑

用示波器捕一下波形吧很可能有问题
另外EEPROM的器件识别号别弄错了，如果A0A1A2都接GND的话，应该先发0bX010_1000

xtx 发表于 2012-4-26 17:28:27

先用软件仿真下看看起始信号和停止信号结合IIC的协议。然后通过逻辑分析仪进行测试的。

YL043_2011 发表于 2012-4-26 19:37:09

xtx 发表于 2012-4-26 17:28 static/image/common/back.gif
先用软件仿真下看看起始信号和停止信号结合IIC的协议。然后通过逻辑分析仪进行测试的。 ...

那个用QUARTUS仿真的时候的时候那个scl 是input的时候就没现象改成out的时候就有为什么呢？

wye11083 发表于 2012-4-26 19:40:09

你这问题问得也太。。了吧。建议你好好学学I2C协议再来发东西。

USACH 发表于 2012-4-26 20:56:49

无级电工发表于 2012-4-26 16:36 static/image/common/back.gif
一下愣住了：这是什么语言？似曾相识，恍惹隔世。

我也有这种感觉，很多年没看啦。

xtx 发表于 2012-4-26 21:24:43

YL043_2011 发表于 2012-4-26 19:37 static/image/common/back.gif
那个用QUARTUS仿真的时候的时候那个scl 是input的时候就没现象改成out的时候就有为什么呢？ ...

SCL 是输入，采用测试平台编写激励代码；
SDA 是 INOUT，上网查下INOUT的用法和如何仿真

xtx 发表于 2012-4-26 21:26:00

另外建议楼主不要急功近利，多看看基础知识，一步一步来

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写了一个IIC写读24C08的程序，怎么也弄不出来