prince 发表于 2005-11-9 17:21:19

关于ATmega128和cc2420的连接问题

ATmega128与CC2420连接有八条线,其中SPI四条,分别为:CSN,SI,SO,SCLK,另外四条分别为:SFD,CCA,FIFO(128的26脚PD1),FIFOP(128的25脚PDO),可是我的ATmega128的这两个脚已经用了连接了IIC电路的SDA,和SCL脚,怎么办啊???

   请马老师和大家帮助,谢谢大家!!

zhiyu 发表于 2008-2-28 22:39:46

*******************************************************************************************************/
#ifndef HAL_CC2400DB_H
#define HAL_CC2400DB_H




/*******************************************************************************************************
*******************************************************************************************************
**************************                   AVR I/O PORTS                   **************************
*******************************************************************************************************
*******************************************************************************************************/


//-------------------------------------------------------------------------------------------------------
// Port B
#define CSN             0// PB.0 - Output: SPI Chip Select (CS_N)
#define SCK             1// PB.1 - Output: SPI Serial Clock (SCLK)
#define MOSI            2// PB.2 - Output: SPI Master out - slave in (MOSI)
#define MISO            3// PB.3 - Input:SPI Master in - slave out (MISO)
#define OLED            4// PB.4 - Output: Orange LED
#define VREG_EN         5// PB.5 - Output: VREG_EN to CC2420
#define RESET_N         6// PB.6 - Output: RESET_N to CC2420
#define GLED            7// PB.7 - Output: Green LED
//-------------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------------
// Port D
#define FIFOP         0 // PD.0 - Input:FIFOP from CC2420
#define FIFO            1 // PD.1 - Input:FIFO from CC2420
#define UART1_RXD       2 // PD.2 - Input:UART1 RXD
#define UART1_TXD       3 // PD.3 - Output: UART1 TXD
#define SFD             4 // PD.4 - Input:SFD from CC2420
#define UART1_RTS       5 // PD.5 - Output: UART HW handshaking: RTS
#define CCA             6 // PD.6 - Input:CCA from CC2420
#define UART1_CTS       7 // PD.7 - Input:UART HW handshaking: CTS
//-------------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------------
// Port E
#define JOYSTICK_UP   0 // PE.0 - Input : Joystick up button
#define JOYSTICK_RIGHT1 // PE.1 - Input : Joystick right
#define JOYSTICK_CENTER 2 // PE.2 - Input : Joystick center
#define RLED            3 // PE.3 - Output: Red LED
#define YLED            4 // PE.4 - Output: Yellow LED
#define BUTTON          5 // PE.5 - Input : Push button S2
//-------------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------------
// Port F
#define JOYSTICK_LEFT   1 // PF.1 - Input: Joystick left
#define JOYSTICK_DOWN   2 // PF.2 - Input: Joystick down

// ADC inputs
#define ADC_INPUT_0_POT_METER       0 // PF.0 - ADC0 with potentiometer
#define ADC_INPUT_1               1 // PF.1 - ADC1
#define ADC_INPUT_2               2 // PF.2 - ADC2
#define ADC_INPUT_3_TEMP_SENSOR   3 // PF.3 - ADC3 with temp sensor

// JTAG interface:
//   PF.4 - Input : JTAG TCK serial clock
//   PF.5 - Input : JTAG TMS strobe enable
//   PF.6 - Output: JTAG TDO serial data output
//   PF.7 - Input : JTAG TDI serial data input
//-------------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------------
// Port G
//-------------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------------
// External RAM interface:
//   PA and PC - Multiplexed address/data
//   PG.0 - Output: Write enable: WR_N
//   PG.1 - Output: Read enable: RD_N
//   PG.2 - Output: Address Latch Enable: ALE
//-------------------------------------------------------------------------------------------------------


//-------------------------------------------------------------------------------------------------------
// Port setup macros

// Port initialization
// Disables pull-up on all inputs!!!
#define PORT_INIT() \
    do { \
      SFIOR |= BM(PUD); \
      DDRB= BM(RESET_N) | BM(VREG_EN) | BM(MOSI) | BM(SCK) | BM(CSN) | BM(OLED) | BM(GLED); \
      PORTB = BM(RESET_N) | BM(MOSI) | BM(SCK) | BM(CSN); \
      DDRD= BM(UART1_RTS); \
      PORTD = BM(UART1_RTS) | BM(UART1_CTS);\
      DDRE= BM(RLED) | BM(YLED); \
      PORTE = 0x00; \
    } while (0)
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