关于用两个hc595控制数码管的程序，麻烦大家帮帮忙。。我快哭了。。 (amobbs.com 阿莫电子技术论坛) -

lsjshengll 发表于 2011-7-21 08:02:50

关于用两个hc595控制数码管的程序，麻烦大家帮帮忙。。我快哭了。。

我听别人建议修改一下，我想用两个并联74hc595控制数码管静态输出电路图在最下面，
module led(clk,sw_ret,dsrt,dain,dclk,dlk);
input clk; //时钟
input sw_ret; //按键输入复位信号控制drst输出复位（可以先不要）
output reg dsrt; //输出复位信号到595
output reg dain; //数据输出带595
output reg dclk; //移位信号输出到595
output reg dlk; //锁存输出到595

我思路是将16个数据信号（包括头四位不相关数据，中间四位位选，最后八位段选）先移位到两个74hc595，然后锁存一次输出，轮流选中4个数码管，我设置了两个标志变量为 ready （16位数据最高位已经移近dain信号输出端）和 busy （数据正在传送）来防止传输数据被覆盖，可是就是不行，已经确定不是硬件问题，例程可以显示。。。

再次求会的朋友给个思路，或者问题可能所在，求求大家。。。fpga我刚到手两天。。。所以可以的话最好说明清楚一下。。。谢谢。。谢谢。。

下面是之前的贴，可以跳过去看下面电路。。谢谢
我刚学几天fpga，对verilog不熟，可是又要赶着要用。。昨天一整天都在弄这个现实，就是不行。。警告也很多。。写进去数码管一个不亮，麻烦会的大哥大姐帮帮忙啊，我后天就要用这个。。T T 程序如下，还有电路图。。。写的有些乱。。
还有有这个编程什么技巧啊？并行执行实在是不适应。。我见他们历程都用了很多标志变量进行判断，我就是不知道怎么用。。想谢谢帮忙，谢谢。。

`timescale 1ns / 1ps
module led(clk,sw_ret,dsrt,dain,dclk,dlk);
input clk;
input sw_ret;
output reg dsrt;
output reg dain;
output reg dclk;
output reg dlk;
reg tim/*,duan*/,wei;
reg data_in,data_buf1;
reg flag1,flag2=0;
// reg num;
reg cou;

parameter
d0= 8'b1100_0000,
d1= 8'b1111_1001,
d2= 8'b1010_0100,
d3= 8'b1011_0000,
w0=8'b1111_0001,
w1=8'b1111_0010,
w2=8'b1111_0100,
w3=8'b1111_1000;

initial data_in=16'h0123;
always@(posedge clk)
begin
if(!sw_ret) dsrt<=0;
else tim<=tim+1'b1;
end
always@(posedge clk)
begin
if(!flag1) begin flag1<=1;data_buf1<=data_in;end

else
begin
if(!flag2)
begin
dlk<=0;
case(tim)
00:begin wei<=w0;/*num<=data_buf1;*/end
01:begin wei<=w1;/*num<=data_buf1;*/end
10:begin wei<=w2;/*num<=data_buf1;*/end
11:begin wei<=w3;/*num<=data_buf1;*/end
endcase

/* case(num)
0:begin duan<=d0;end
1:beginduan<=d1;end
2:beginduan<=d2;end
3:beginduan<=d3;end
endcase */
data_buf1<={wei,8'h00};
if(data_buf1)
begin dain<=data_buf1;data_buf1<=data_buf1<<1;end
else flag2<=1;
end

else
begin
if(((tim>8'h02)&&(tim<8'h22))||((tim>8'h42)&&(tim<8'h62))||((tim>8'h82)&&(tim<8'ha2))||((tim>8'hc2)&&(tim<8'he2)))
begin dclk<=~dclk;cou<=cou+1; end
else if(cou>32) begincou<=0;flag2<=0;dlk<=1;end
end
end
end
endmodule

下面程序警告，说有很多固定值，不知道有没有影响：

WARNING:Xst:653 - Signal <data_in> is used but never assigned. This sourceless signal will be automatically connected to value 0000000100100011.
WARNING:Xst:1710 - FF/Latch <data_buf1_0> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_1> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_2> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_3> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_4> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_5> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_6> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_7> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <wei_2> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <wei_3> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_buf1_0> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_1> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_2> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_3> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_4> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_5> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_6> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_buf1_7> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <wei_2> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <wei_3> (without init value) has a constant value of 0 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <wei_4> (without init value) has a constant value of 1 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <wei_5> (without init value) has a constant value of 1 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <wei_6> (without init value) has a constant value of 1 in block <led>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <wei_7> (without init value) has a constant value of 1 in block <led>. This FF/Latch will be trimmed during the optimization process.

http://cache.amobbs.com/bbs_upload782111/files_43/ourdev_659667ENOXYW.jpg
电路图 (原文件名:54fbb2fbc99cdb6f4f4aeabc.jpg)

谢谢，谢谢。。。

lsy5110 发表于 2011-7-21 08:41:16

我用595时第十脚是接高电平的11.12。13.14可控，13也可接地。fpga不懂的。

g47603690 发表于 2011-7-21 08:57:36

LZ,不要着急呵呵
先确定是程序的问题还是硬件的问题

lsjshengll 发表于 2011-7-21 08:58:52

回复【2楼】g47603690
-----------------------------------------------------------------------

不是硬件问题。。例程可以跑。。怎么能不急，明天就要用了。。T T

shmilygt 发表于 2011-7-21 09:09:40

回复【3楼】lsjshengllL杰
-----------------------------------------------------------------------

module led(clk,sw_ret,dsrt,dain,dclk,dlk);

你这个是没有显示数据输入的，你要显示什么啊？

lsjshengll 发表于 2011-7-21 09:18:05

回复【4楼】shmilygt
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有clk输入啊。。。sw_ret是按键接口。。。用数码管静态显示数字。。

Jigsaw 发表于 2011-7-21 09:21:04

你这代码写得，唉……
“if(((tim>8'h02)&&(tim<8'h22))||((tim>8'h42)&&(tim<8'h62))||((tim>8'h82)&&(tim<8'ha2))||((tim>8'hc2)&&(tim<8'he2)))”

warning比代码还多……

在每个时钟沿，寄存器的数据往595移一位，移完8位或16位，锁存输出。
看你这个原理图，应该先移位选，再移段码

你这个OE直接接地，显示的时候会闪的，LZ自己设计的电路板？

Jigsaw 发表于 2011-7-21 09:23:27

回复【5楼】lsjshengll L杰
回复【4楼】shmilygt
-----------------------------------------------------------------------
有clk输入啊。。。sw_ret是按键接口。。。用数码管静态显示数字。。
-----------------------------------------------------------------------

两片595，最多可提供16个输出pin，四位数码管静态显示共需32个pin
请问，楼主如何静态显示？

lsjshengll 发表于 2011-7-21 09:30:15

回复【6楼】Jigsaw
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不是，。。买的。。。没办法啊。。我才用两天。。。之前做写简单的实验没问题。。。到了这里发觉这种并行输出的芯片这么难用。。而且后天要用了。。救命啊。。

lsjshengll 发表于 2011-7-21 09:31:27

回复【7楼】Jigsaw
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为什么要32位呢？不是用十二位就够啦嘛。。4位位选，8位段选。。。

lsjshengll 发表于 2011-7-21 09:32:54

回复【6楼】Jigsaw
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还有那个if判断是参考一个视频上面的教程的。。。其实我自己没想到怎么进行移位输出。。今天想到了用准备。。判忙标志为。。不过不知道什么时段移位才正确。。T T

vipcff 发表于 2011-7-21 09:41:05

建议去新华书店，书里好多都是这样的例子

Jigsaw 发表于 2011-7-21 09:44:30

回复【9楼】lsjshengll L杰
回复【7楼】jigsaw
-----------------------------------------------------------------------
为什么要32位呢？不是用十二位就够啦嘛。。4位位选，8位段选。。。
-----------------------------------------------------------------------

有clk输入啊。。。sw_ret是按键接口。。。<font color='#FF0000'>用数码管静态显示数字。。

<font color='#000000'>这么急，这么多问题，你还是直接到网上找源码综合吧
应付完眼前的任务再好好看看FPGA的书

lsjshengll 发表于 2011-7-21 09:45:56

回复【12楼】Jigsaw
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额。。我考试不是要用fpga显示数码管。。我只想想通过实验尽快熟悉这种板子。。具体任务还不知道。。还是谢谢你，。。

lsjshengll 发表于 2011-7-21 10:00:16

难道没有朋友可以帮帮手吗？或者给我编个大概的程序结构图。。这么说很没礼貌，没报酬还要别人，不好意思，不过我真的很急啊。。求求会的朋友稍微浪费少少时间帮帮忙。。有空来QD我请吃饭啊。。T T

306468117 发表于 2011-7-21 17:35:44

你把你的输入，输出接口定义好，功能要求说明详细再来找人帮忙。看你写的代码直接晕掉，也不明白你按键作为输入数码管静态显示是个神马意思。。。

lsjshengll 发表于 2011-7-21 18:54:13

回复【15楼】306468117
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嗯嗯。。谢谢。。我再发个贴。。

lyi619 发表于 2011-7-30 16:07:16

那现在你肯定不用了吧？？用的话找我啊，我给你发个，觉得这个还是比较简单的..

lsjshengll 发表于 2011-8-4 15:21:57

回复【17楼】lyi619
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刚看见你的回复，后来我直接调例程改了改就拿来用了。。。之后我又自己写了一个，可以用，不过有余亮，没有例程的那个子程序文件的好。。不知道为什么。。还是谢谢你。。。

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关于用两个hc595控制数码管的程序，麻烦大家帮帮忙。。我快哭了。。