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Mentor 发表于 2011-4-23 20:12:13

这段话怎么理解？CycloneII 手册.

When reading from the memory, DDR and DDR2 SDRAM devices send
the data edge-aligned relative to the data strobe. To properly read the
data, the data strobe must be center-aligned relative to the data inside the
FPGA. Cyclone II devices feature clock delay control circuitry to shift the
data strobe to the middle of the data window

Mentor 发表于 2011-4-23 20:14:01

edge-aligned
center-aligned
什么意思？

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