cicnx 发表于 2011-4-3 13:53:46

有关Nios II 自动升级请教

芯片 CII

Nios II 程序配置都在 EPCS16上, NIOS II 跑在SDRAM中
有没有办法让程序自动升级配置程序及Nios 程序?

设想是这样的, 上位机通过 SPI接口把 程序及FPGA的配置信息传送到Nios 系统中,暂存于SDRAM中, NIOS II程序再
通过读写EPCS16来升级硬件及nios程序。

现在要更新都要打开机箱用JTAG来下载, 这种方式不方便客户升级。 如有新程序我只需给客户发送升级文件过去。 客户可自行用U盘通过上位机(上位机与FPGA是通过SPI通讯的, 这部份已经做好)来下载到系统板自动升级自新。

关键两点:

1.Nios II 下面访问EPCS,把数据写进去
2.怎样制做这个升级ROM文件? 就是把.sof 和 .elf 文件合并成一个rom .


不知道有没有人这样实现过?

arokh 发表于 2011-4-3 14:13:04

通读以下全文,重点是Convert .flash file to binary, remote update 以及3. sof in EPCS, program in EPCS 这两部分

Flash Programmer
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During development, we use nios2-configure-sof and nios2-download to config the FPGA and run Nios II program from SDRAM. But the content of FPGA and SDRAM will lose when power off. To enable the system to start from power on, we need to write sof and program to flash. But flash have limited write life and the write speed is slow, so you should not program the flash until you have your system mostly tested.

Though we can use JTAG UART as console with nios2-terminal during development. You should not use it as console device if you want your system to start automatically when power on. Because the JTAG UART will hang without a nios2-terminal connected. You should use Serial UART with a RS232C cable instead. You can keep both the JTAG UART and serial UART in SOPC builder, but you must disable "Support for console on Altera JTAG UART" in kernel config and rebuild the kernel image. Please check LinuxConfig about how to select the other console device instead of JTAG UART. You have to test the new kernel image with nios2-download. Don't run nios2-terminal, use minicom on Linux or Hyper-terminal on Windows. Make sure it runs correctly over the RS-232C COM port.

Only after you have tested the program from sdram, you may try to write the flash. You will write the sof and program image seperately. You must find out what kind of flash you will use. There may be CFI flash, or EPCS flash, or both of them. <span id="fck_dom_range_temp_1285280942148_81" />

First, you must decide where to configure FPGA, from CFI or EPCS. This will mostly depend on the hardware, config mode pins or CPLD. You need to check the manual if it is a dev board. For DE2, DE1, some eval and starter boards, the sof is loaded in EPCS flash. For most other Altera dev boards, you can select one either CFI or EPCS with the CPLD. The CPLD will control the config offset on CFI, eg, 0xc00000.

Next, you must decide where to store the program. Most dev boards have a CFI flash, and you can use it by default. If your board have space on EPCS, you may use it but EPCS is usually slower than CFI during read. You must tell which component to use for reset vector, CFI flash or EPCS controller, in SOPC builder. If you change it, you regenerate the sof. You don't need to rebuild the kernel image.

The altera epcs boot loader is position independent. It is located in a onchip memory inside the epcs controller. The elf2flash gets load address from the elf.

The Altera flash conversion utility can add a Altera supplied boot loader, which will load the image to SDRAM and execute. The kernel image is compiled to start from SDRAM, (sdram base + boot link offset of the uncompress loader). So the start up procedures will be

power on reset
config sof from flash to FPGA
Nios II CPU start at the reset vector, which contain the boot loader
the boot loader copy program image from flash to SDRAM, at (sdram base + boot link offset) for our zImage
the uncompress loader in our zImage, copy the real kernel image to (sdram base)
kernel start up

Check your kernel dir, linux-2.6.x/include/nios2_system.h or check in SOPC builder , to find out the EPCS controller, or CFI flash 's base address. You will need these address value for flash programming.

You may find the boot loader sources at your altera suite installation, /opt/altera9.0/nios2eds/components/altera_nios2/boot_loader_sources

Some more details about EPCS boot loader, when you select reset vector to EPCS controller, a small hidden onchip memory is added by SOPC builder. The small onchip memory will have the Altera supplied boot loader for EPCS. So actually, it is "reset from onchip memory". (The real io port locates after this memory, it is at offset 0x200 currently. But if Altera change it on some devices someday, you will need to change it in EPCS driver.) Note, you must use Nios2 v5.1 sp1 or later to program the EPCS correctly.

The boot loader srec files is located in$SOPC_KIT_NIOS2/components/altera_nios2/

for cfi flash boot, useboot_loader_cfi.srec
for epcs boot on cyclone1,cyclone2, use boot_loader_epcs.srec
for epcs boot on newer devices , use boot_loader_epcs_sii_siii_ciii.srec
If you use MMU, add --mmu option to nios2-flash-programmer command.

So we might have at least four alternatives,

sof in EPCS, program in CFI (default for DE2, DE1, some eval and starter boards)
sof in CFI, program in CFI
sof in EPCS, program in EPCS
sof in CFI, program in EPCS   ( in very rare case)
Contents
1 1. sof in EPCS, program in CFI
2 2. sof in CFI, program in CFI
3 3. sof in EPCS, program in EPCS
4 Convert .flash file to binary, remote update


1. sof in EPCS, program in CFI
Using DE2_NET v1.5 as example (see TryOutuClinux ), find out and change the sof path, cfi base and epcs base below.

Open a Linux shell terminal, (or a Nios2 command shell on Windows)

# config the fpga
nios2-configure-sof ~/download/DE2_NET.sof
# change to your uClinux image dir
cd ~/uClinux-dist/images
# Creating .flash file for the FPGA configuration
sof2flash --epcs --input=~/download/DE2_NET.sof --output=standard.flash
# Programming flash with the FPGA configuration
nios2-flash-programmer --epcs --base=0x00680800 standard.flash
# Creating .flash file for the project
elf2flash --base=0x00000000 --end=0x3fffff --reset=0x0 --input=zImage --output=ext_flash.flash --boot=$SOPC_KIT_NIOS2/components/altera_nios2/boot_loader_cfi.srec
# Programming flash with the project
nios2-flash-programmer --base=0x00000000 ext_flash.flash
2. sof in CFI, program in CFI
Using Altera Nios Dev board, Cyclone II 2C35 , standard example, find out and change the sof path, and cfi base below.

# config the fpga
nios2-configure-sof $SOPC_KIT_NIOS2/examples/verilog/niosII_cycloneII_2c35/standard/standard.sof
# change to your uClinux image dir
cd ~/uClinux-dist/images
# Creating .flash file for the FPGA configuration
sof2flash --offset=0xC00000 --input=$SOPC_KIT_NIOS2/examples/verilog/niosII_cycloneII_2c35/standard/standard.sof --output=standard.flash
# Programming flash with the FPGA configuration
nios2-flash-programmer --base=0x00000000 standard.flash
# Creating .flash file for the project
elf2flash --base=0x00000000 --end=0xffffff --reset=0x0 --input=zImage --output=ext_flash.flash --boot=$SOPC_KIT_NIOS2/components/altera_nios2/boot_loader_cfi.srec
# Programming flash with the project
nios2-flash-programmer --base=0x00000000 ext_flash.flash
3. sof in EPCS, program in EPCS
Using Altera Nios Dev board, Cyclone II 2C35 , standard example, find out and change the sof path, and epcs base below.

# config the fpga
nios2-configure-sof $SOPC_KIT_NIOS2/examples/verilog/niosII_cycloneII_2c35/standard/standard.sof
# change to your uClinux image dir
cd ~/uClinux-dist/images
# Creating .flash file for the FPGA configuration
sof2flash --epcs --input=$SOPC_KIT_NIOS2/examples/verilog/niosII_cycloneII_2c35/standard/standard.sof --output=standard.flash
# Programming flash with the FPGA configuration
nios2-flash-programmer --epcs --base=0x02200000 standard.flash
# Creating .flash file for the project
elf2flash --epcs --after=standard.flash --input=zImage --output=epcs_controller.flash --boot=$SOPC_KIT_NIOS2/components/altera_nios2/boot_loader_epcs.srec
# Programming flash with the project
nios2-flash-programmer --epcs --base=0x02200000 epcs_controller.flashMMU example

sof2flash --epcs --input=NiosII_cycloneII_2c35_full_featured.sof --output=fpga.flash

nios2-flash-programmer --epcs --mmu --base=0x03200000 fpga.flash

elf2flash --epcs --after=fpga.flash --input=zImage --output=zImage.flash --boot=$SOPC_KIT_NIOS2/components/altera_nios2/boot_loader_epcs.srec

nios2-flash-programmer --epcs --mmu --base=0x03200000 zImage.flash



Convert .flash file to binary, remote update
When we want to write FPGA config data, program image or file system image to CFI flash or EPCS on Nios2 uClinux, we need




create MTD device using MTD map driver and rebuild kernel, see following sections. eg, we have 3 mtd dev, with mtd 0,1 on CFI for jffs2,kernel and mtd 2 on EPCS for fpga config.
convert the .flash file (which is srec format), to binary format on Linux PC, eg. nios2-linux-uclibc-objcopy -I srec -O binary standard.flash standard.bin
find out the MTD devices on Nios2 uClinux, cat /proc/mtd
(transfer the file to Nios2..) write the binary file to MTD device on Nios2 uClinux, eg. copy config data to EPCS on mtd 2,
cp standard.bin /dev/mtd2
sync# flush write cache to dev
Or you can use the flash utility included in uClinux-dist.

Note, you must use --epcs flag to sof2flash if and only if you want to generate for EPCS.
The EPCS config data is different from that of CFI flash.


_____________________________________________________________________________

Convert elf object to binary,

nios2-elf-objcopy -O binary zImage zImage.bin

or,

nios2-linux-gnu-objcopy -O binary zImage zImage.bin

_____________________________________________________________________________

You may try u_boot to program the flash. There is a C program to convert the rbf for EPCS flash in the wiki.

Retrieved from "http://www.alterawiki.com/wiki/Flash_Programmer"

flyaudio 发表于 2013-5-29 18:04:14

arokh 发表于 2011-4-3 14:13 static/image/common/back.gif
通读以下全文,重点是Convert .flash file to binary, remote update 以及3. sof in EPCS, program in EPCS ...

看了之后也不是很懂。
把 .flash 文件转换成 .bin 文件,然后就可以了吗?      

.flash 似乎有包含地址信息的,转换了之后这些地址信息还在么?

怎么用.bin文件往EPCS里面写数据?

chun2495 发表于 2013-7-30 09:34:33

flyaudio 发表于 2013-5-29 18:04 static/image/common/back.gif
看了之后也不是很懂。
把 .flash 文件转换成 .bin 文件,然后就可以了吗?      



这个我们做过 不过这是公司的机密

skycomm 发表于 2013-7-30 16:15:30

机密个毛   直接将bin文件顺序写到flash上重新上电就可以了

HalseyZhong 发表于 2013-7-31 12:30:23

顶楼上这位arokh 兄台: 非常值得学习,现在用USB update 程序对用户来说很方便,值得学习。

shappy 发表于 2013-7-31 23:20:50

skycomm 发表于 2013-7-30 16:15 static/image/common/back.gif
机密个毛   直接将bin文件顺序写到flash上重新上电就可以了

就是这样的,先要转换SOF文件和elf文件,搞成二进制文件(BIN文件),通过一个端口发送给nios,让它操作EPCS器件,写入EPCS内,断电、上电,搞定!

zxq6 发表于 2013-7-31 23:50:56

关注一个

qidaimengxing 发表于 2015-1-10 12:17:33

正在做这个研究一下

孙风雷 发表于 2016-4-14 16:28:03

研究研究 试试看

孙风雷 发表于 2016-4-14 16:54:33

qidaimengxing 发表于 2015-1-10 12:17
正在做这个研究一下

你好,想请教一下这个.flash文件如何转换成.bin文件?

孙风雷 发表于 2016-4-14 16:58:24

qidaimengxing 发表于 2015-1-10 12:17
正在做这个研究一下

你好,想请教一下这个.flash文件如何转换成.bin文件?

aureole 发表于 2016-4-14 17:03:58

楼主给你提供两个思路,
1、加个ch341(用作usb转spi功能);再加个74hc595,用341写epcs,341的另外一个片选写595译码出来几个 IO,用io控制是341连接 epcs还是 fpga连接epcs。。。这个思路,我做bf531升级程序用过,很好用,道理一样的。

2、参考我的 iCore3,用 PS 模式配置 fpga,加一片几块钱的stm32, 用一个flash虚拟成u盘,直接u盘拷贝进去就可以升级固件了,都非常简单。

至于sof 和 elf 怎么合成epcs的文件,这个官方有文档,很简单的。也有几种方法。。

我的iCore3 资料点击我的签名能找到。
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