仿真时的错误 看不懂
Error (10001): Verilog HDL or VHDL error at ZTQ.vhd(84): can't infer register for ACC because it does not hold its value outside the clock edge有谁知道这个是什么错误啊 天哪没人知道吗 ? ?? 杯具
在google里面输入 signal does not hold its value outside clock edge 你难道不知道。
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