CPLD如何手动最优化脚位？（Q2）
Q2：如果手动不设置脚位，那么速度比手动设置脚位慢10MHZ，这个如何处理？程序实际工作正常，无视他么？
未手动设置脚位时
Info: Clock "BCKI" has Internal fmax of 131.58 MHz between source register "lpm_counter:cb_rtl_1|dffs" and destination register "BUF" (period= 7.6 ns)
手动设置脚位后
Info: Clock "BCKI" has Internal fmax of 120.22 MHz between source register "lpm_counter:cb_rtl_1|dffs" and destination register "BUF" (period= 8.6 ns)
另外是我没有做时钟约束，编译后出现
Warning: Found pins functioning as undefined clocks and/or memory enables
一定要设置时钟约束么？
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