[请教] 二进制ASK解调电路故障
各位朋友，大家晚上好。这几天我被这段代码折腾死了。了解的朋友请帮忙看看。编译没什么问题，可是综合之后出现了不少错误，仿真出来的结果也不对。
=======================================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity deask2 is
port(clk,x:in std_logic;
y:out std_logic);
end deask2;
architecture one of deask2 is
signal q:integer range 0 to 7;
signal xx:std_logic;
signal m:integer range 0 to 7;
begin
process(clk,m)
begin
if clk'event and clk='1' then xx<=x;
if q=7 then q<=0;
else
q<=q+1;
end if;
end if;
end process;
process(m,xx,q)
begin
if q=7 then m<=0;
elsif q=6 then
if m<=3 then y<='0';
else y<='1';
end if;
elsif rising_edge(xx) then m<=m+1;
end if;
end process;
end one;
附件是工程文件，其中x是ASK信号。
点击此处下载 ourdev_559092.rar(文件大小:276K) (原文件名:deask2.rar) 我把几个错误信息拎出来，看看有没人晓得是怎么回事？
Warning: Timing Analysis is analyzing one or more combinational loops as latches
Warning: Node "y$latch" is a latch
Warning: Found 5 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
Info: Detected ripple clock "q" as buffer
Info: Detected ripple clock "q" as buffer
Info: Detected ripple clock "q" as buffer
Info: Detected gated clock "Equal1~0" as buffer
Info: Detected ripple clock "xx" as buffer
Warning: Circuit may not operate. Detected 9 non-operational path(s) clocked by clock "clk" with clock skew larger than data delay. See Compilation Report for details. 前面帖的代码在网络上很常见，其他人在综合的时候不知道有没出现这个问题。我修改了下程序结构就OK了。折腾了俩礼拜，不过还是有所收获。
===============================================================================
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity deask2 is
port(clk,x:in std_logic;
y:out std_logic);
end deask2;
architecture one of deask2 is
signal q:integer range 0 to 11;
signal xx:std_logic;
signal m:integer range 0 to 8;
begin
xx<=x;
process(clk,q)
begin
if clk'event and clk='1'then
if q=11 then q<=0;
else q<=q+1;
end if;
end if;
end process;
process(clk,xx,q,m)
begin
if clk'event and clk='1' then
if q=10 then
if m<=7 then y<='0';
else
y<='1';
end if;
end if;
end if;
end process;
process(xx,m,q)
begin
if q=11 then m<=0;
elsif xx'event and xx='1' then m<=m+1;
end if;
end process;
end one;
码片长设为12个时钟周期。 呃~~~我来捧捧场
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