请教有关FIFO的问题
Error (10481): VHDL Use Clause error at top.vhd(9): design library "UNISIM" does not contain primary unit "VComponents"我编译程序的时候出现这个错，是怎么回事啊？
请高手指教。
Error (10481): VHDL Use Clause error at top.vhd(9): design library "UNISIM" does not contain primary unit "VComponents"
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