millwood0 发表于 2009-11-27 00:18:45

3-wire Serial Interface to LCD

the typical HD44780-based LCDs require 8 data lines (4 if running in 4-bit mode), plus 2-3 control lines.

that may be a problem on mcus with limited number of output pins.

one of the solutions is to use a LCD with serial interface but that can be expensive.

here is a solution that uses shift registers (74xx164 or the equivalent). The resulting connection requires just 3 pins from the mcu (plus two for Vdd and GND).

and the code is written flexibly so you can port it to other platforms easily. the connection is defined in the header file so if you change the connection, you can just recompile.

enjoy.

http://cache.amobbs.com/bbs_upload782111/files_22/ourdev_507951.PNG
(原文件名:12F675 3-wire Serial LCD.PNG)

millwood0 发表于 2009-11-27 00:29:42

the code base is here.

点击此处下载 ourdev_507953.rar(文件大小:12K) (原文件名:12F675 3-wire LCDDemo.rar)

cowboy 发表于 2009-11-27 08:15:41

Hello millwood0 ,RS引脚为什么不接到74HC164的输出端?是为了编程方便吗?

millwood0 发表于 2009-11-27 19:28:24

"RS引脚为什么不接到74HC164的输出端?是为了编程方便吗?"

so you retain the flexibility to put the LCD in 8bit or 4bit mode.

millwood0 发表于 2009-11-27 19:29:41

I was just reading the datasheet for DS18 and the 1-wire bus used there and thought it may be possible to utilize a similar system here and combine the CLK line with the Data line to create a two wire system.

cowboy 发表于 2009-11-27 23:19:52

可以的,不过你可能需要把芯片换成74hc595,我曾做过试验,单根混合数据线就可以传送。
http://www.ourdev.cn/bbs/bbs_content.jsp?bbs_sn=2243715 该贴子图中数码管模块就是单线传送。

millwood0 发表于 2009-11-28 20:21:49

here is the same program in 8-bit mode.

http://cache.amobbs.com/bbs_upload782111/files_22/ourdev_508545.PNG
(原文件名:12F675 3-wire 8bit.PNG)

here is the code base

点击此处下载 ourdev_508546.rar(文件大小:12K) (原文件名:12F675 3-wire LCDDemo.rar)

millwood0 发表于 2009-11-28 20:40:13

here is a short description of this 2-wire system.

most of the shift registers work by reading the SI / DAT line when the clock goes from low to high. so if you have a r/c network linking the clock to the SI, as in the attached schematic.

so when you transmit a short low pulse on the clock line, when you pull the clock line high, the voltage on the capacitor dips just a little bit, and the dataline will read a 1.

when you transmit a long pulse on the clock line, the voltage on the capacitor will have diped enough so the dataline reads 0 when the clock transits from low to high.

in my design, I sent the total pulse length (ttotal) to 60us. a short pulse would be 1 us. As to the long pulse, I want to give enough time so that the capacitor is fully charged up so I will pull the clock line low for no more than 50% of ttotal, aka 30us.

As to the value of the R/C network: I don't want to overload the mcu pins. to design for ARM chips which output 2ma, I want the current load to be 0.5ma. so I use R=3.3v/0.5ma=6.7k, and I will pick 10k.

the time constant of the rc network should not be too short so that a short pulse will still read a 1, but shortlyn't be too long either. I want to make sure that it gets to zero by 50% of the long pulse (30us). so 15us. that means a C of 1.5n, and I will use 1.1nf.

the program goes something like this:

void send_bit(unsigned char Ton) {
unsigned char Ttotal=60; //pulse cycle of 60us
SPI_CLK=0;//pull the spi_clk low;
delay_us(Ton); //delay;
SPI_CLK=1;//pull the spi_clk high;
delay_us(Ttotal-Ton);
}

so send_bit(1) will send a 1us low pulse on the clock line and shift a 1 into the shift register; send_bit(30) will send a 30us pulse on the clock line and shift a 0 into the shift registor.

obviously, this will take 60us*8=.5ms to send one byte.

you can easily implement the concept in my spi_send_byte(routine) without changing the rest of the program to create a two wire system.

http://cache.amobbs.com/bbs_upload782111/files_22/ourdev_508553.PNG
(原文件名:12F675 2-wire 4bit.PNG)

cowboy 发表于 2009-11-28 23:35:43

按照这种方法,有个难点不能解决,就是系统的实时性。如果系统中存在中断,且中断处理时间不是很短,那么会影响这个串行数据的传输,并可能出现错误。millwood0 有没有好的方法解决这个难点?

millwood0 发表于 2009-11-29 00:36:10

cowboy, you are absolutely right.

if an interrupt is taking too long to execute, aka it is materially more than the shortest duration (for 1) and comparable to the longest duration (for 0), the output may be faulty.

a few possibilities:

1) increase the cycle time. 60us was chosen to be comparable to Maxim's 1-wire system but you can pick a longer one.
2) tristate the SPI_CLK pin in the interrupt: once you go into an interrupt, you can turn the SPI_CLK pin into a high impedance mode (aka input mode) so the capacitor doesn't get discharged.
3) make sure you write very short interrupt routines - which they should be.

yeah, that's the price you pay for eliminating one wire.

another question: can you figure out a way to eliminate the LCD_EN wire?

yemingxp 发表于 2009-11-29 00:41:02

现在的芯片动辄上100脚,节省几个IO的场合越来越少

cowboy 发表于 2009-11-29 01:40:08

to millwood0:
turn the SPI_CLK pin into a high impedance mode , so the capacitor doesn't get discharged.
但是,当口线从高阻抗状态恢复时,HC164的CLK引脚可能会引入一个额外的脉冲。

one wire 模式中,我在EN中加入RC,时间常数更长。显然这会使LCD更新很慢,我的方法只适合驱动数码管。

millwood0 发表于 2010-1-24 09:43:09

here is a revised version of the 3-wire interface. This time, the demo program has an interrupt running while the lcd routines update the display.

it is confirmed to run on real hardware as well. as you can see from the simulation, it takes about 9ms to update each line of the lcd. pretty fast. the whole program takes about 750bytes, and the lcd routines themselves about 500 bytes.

This can serve as a basis for a serial lcd design, either spi/i2c or even one-wire.

http://cache.amobbs.com/bbs_upload782111/files_25/ourdev_527969.PNG
(原文件名:16F675 3W-RS CLK.PNG)

点击此处下载 ourdev_527970.rar(文件大小:25K) (原文件名:12F675 3-wire LCDemo Clock.rar)

D.lovers 发表于 2010-1-24 16:56:28

学习

xuxiongshi 发表于 2011-10-2 12:56:23

好厉害啊!!!

aheadlead 发表于 2011-10-2 13:06:55

几个神犇在谈话 我来围观

wanglivehuo 发表于 2011-11-23 20:26:32

he```
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