关于一个DDS芯片AD9954的datasheet,其中的一部分,看不懂,好晕啊
Amplitude Control OptionsShaped On-Off Keying
The shaped on-off keying function is enabled/disabled using
the OSK enable bit (CFR1<25>). This function allows the
user to control the ramp-up and ramp-down time when turning
the DAC on or off. This function is primarily used in burst
transmissions of digital data to reduce the adverse spectral
impact of short, abrupt bursts of data.
Both auto and manual shaped on-off keying modes are
supported. CFR1<24> is used to select between auto and
manual on-off keying modes. Figure 20 shows the block
diagram of the OSK circuitry.
Autoshaped On-Off Keying Mode Operation
When autoshaped on-off keying mode is enabled, a single-scale
factor is internally generated and applied to the multiplier input
for scaling the output of the DDS core block (see Figure 20). The
scale factor is the output of a 14-bit counter that increments/
decrements at a rate determined by the contents of the 8-bit
output ramp rate register. The scale factor increments if the
OSK pin is high and decrements if the OSK pin is low. The scale
factor is an unsigned value; all 0s multiply the DDS core output
by 0 (decimal), and 0x3FFF multiplies the DDS core output by
16,383 (decimal).
Table 6 details the increment/decrement step size of the
internally generated scale factor per the ASF<15:14> bits.
Note that the maximum amplitude allowed is limited by the
contents of the amplitude scale factor register, allowing the user
to ramp to a value less than full scale.
Table 6. Autoscale Factor Internal Step Size
ASF<15:14> (Binary)Increment/Decrement Size
00 1
01 2
10 4
11 8
OSK Ramp Rate Timer
The OSK ramp rate timer is a loadable down counter, which
generates the clock signal to the 14-bit counter that generates
the internal scale factor. The ramp rate timer is loaded with
the value of the autoscale factor register (ASFR) every time
the counter reaches 1 (decimal). This load and countdown
operation continues for as long as the timer is enabled, unless
the timer is forced to load before reaching a count of 1.
If the load ARR control bit (CFR1<26>) is set, the ramp rate
timer is loaded upon an I/O update, upon a change in profile
input, or upon reaching a value of 1. The ramp timer can be
loaded before reaching a count of 1 by three methods.
The first method is by toggling the OSK pin or sending a rising
edge to the I/O UPDATE pin (or changing the state of a profile
pin). For this method, the ASFR value is loaded into the ramp
rate timer, which then proceeds to count down as normal.
The second method is if the load ARR control bit (CFR1<26>)
is set and an I/O update (or change in profile) is issued.
The last method is by setting the sweep enable bit. This switches
from inactive autoshaped on-off keying mode to the active
autoshaped on-off keying mode.
http://cache.amobbs.com/bbs_upload782111/files_16/ourdev_461361.jpg
(原文件名:onoff shaped keying.jpg) 我看了好久了,基本上好难懂,希望谁懂的,帮忙解释一下原理性的东西 振幅控制选项
形开关键控
该型开关键控功能启用/禁用使用
启用位的商船( CFR1 “ 25 ” ) 。此功能允许
用户控制的坡道行动和坡道式时谈到
发展援助委员会或关闭。此功能主要用于突发
数字数据传输,以减少不良谱
短期的影响,突然爆发的数据。
这两种自动和手动型开关键控模式
支持。 CFR1 “ 24 ”是用来选择的汽车和
手动开关键控模式。图20显示了块
图商船电路。
Autoshaped开关键控模式操作
当autoshaped开关键控模式被激活,一个规模
的因素是内部产生的,并适用于乘法器输入
扩大的输出DDS的核心区块(见图20 ) 。那个
规模因素是产量的14位计数器递增/
递减速度在所确定的内容, 8位
输出斜率登记。规模因素增加,如果
商船脚高,递减如果商船引脚低。规模
因子是一个未签名的价值;所有0倍增DDS内核输出
0 (十进制) ,并0x3FFF倍增DDS内核输出
16383 (十进制) 。
表6详细介绍了递增/递减的步长
内部产生的比例因子的ASF为“ 15:14 ”位。
请注意,允许的最高幅度是有限的
内容振幅比例因子注册,允许用户
以坡道的值小于充分规模。
表6 。自动调整内部步长因子
的ASF “ 15:14 ” (二元)递增/递减大小
00 1
2月1日
4月10日
11月8日
商船斜率定时器
该商船斜率计时器是一个加载了柜台,其中
产生时钟信号的14位计数器产生
国内规模因素。坡道率定时器装载
的价值,自动调整因素登记( ASFR )每一次
柜台达到1 (十进制) 。这种负荷和倒计时
行动继续,只要计时器启用,除非
计时器被迫负荷,才能达到最后的计数1 。
如果负载发射站控制位( CFR1 “ 26 ” )的设置,斜率
计时器时加载的I / O更新时,改变形象
输入,或应达到的值为1 。坡道定时器可
加载才能到达的计数1三种方法。
第一种方法是通过切换的商船引脚或发送崛起
优势的I / O更新引脚(或改变国家的形象
引脚) 。对于这种方法, ASFR值是加载到坡道
率计时器,然后收益倒计时正常。
第二种方法是,如果负载发射站控制位( CFR1 “ 26 ” )
设置和一个I / O更新(或改变)的发放。
最后一种方法是通过设置扫描使位。这种交换机
由无效autoshaped开关键控模式的积极
autoshaped开关键控模式。
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