microcreat 发表于 2009-7-8 22:52:53

怎样在ise里面仿真？

　　我现在用VHDL语言写程序，但是想仿真．不知道怎么样用ise自带的仿真器仿真！

DanielDeng 发表于 2009-7-9 08:50:28

咱也是新手，关注。

dr2001 发表于 2009-7-9 08:53:31

建议用ModelSim仿真。
早先的ISE就是用ModelSim，新的版本是否自带了仿真器，未知。

microcreat 发表于 2009-7-9 22:13:40

我现在下好了ModelSimDE64d但是不知道那里有crack文件，希望谁有能传上来，好吗！谢谢！

Friendz 发表于 2009-7-9 22:42:19

ModelSim 有ISE 专用的版本吧。

microcreat 发表于 2009-7-9 22:46:09

请问楼上的，能具体说清楚点吗＞我现在找了半天，感觉破解有点难度哦！呵呵１
ise专用版本是什么意思，有下载地址和注册文件吗？

microcreat 发表于 2009-7-9 22:46:52

我现在下载了6.4b,也下载了个crack但是不知道怎么破解！

armwork 发表于 2009-7-10 10:40:25

可以用自带的仿真 ,在芯片属性里选择.

microcreat 发表于 2009-7-10 11:03:58

:INFO:Cpld - Inferring BUFG constraint for signal 'nCLKIN' based upon the LOC constraint 'P38'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.
:Cpld:896 - Unable to map all desired signals into function block, FB1, because too many function block product terms are required. Buffering output signal UART_DATA<7> to allow all signals assigned to this function block to be placed.
:Cpld:896 - Unable to map all desired signals into function block, FB1, because too many function block product terms are required. Buffering output signal UART_DATA<6> to allow all signals assigned to this function block to be placed.

请问上面的警告怎么去除啊 ！

zkf0100007 发表于 2009-7-10 12:32:53

ISE有自带的SIMULATOR的

microcreat 发表于 2009-7-10 22:25:07

哦！谢谢１我找找！

microcreat 发表于 2009-7-13 11:19:52

:INFO:Cpld - Inferring BUFG constraint for signal 'UART_CLKIN' based upon the LOC constraint 'P38'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.
现在就是这个警告有点烦，不知道怎么解决！有遇到过这个警告的吗？能告诉我解决方法吗》
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