请教:关于“轻量级”的中断服务中禁止调度ucos任务!
在arm7+uCOS平台,在某些应用场合中,可能会有这样一种中断: 发生的频率很高,但是中断服务很简单,我称之为“轻量级中断”,具体举例来说,比如毫秒中断,1毫秒发生1次,中断服务中,只对某个变量进行累加(此变量可能不是很重要)。此时,我觉得没有必要进行任务的调度,因为太过于频繁的任务调度会消耗掉不少CPU资源。请教一下专家:
不知,我这个思路是否可行?如果可行,应该如何去修改OS_INT_A.S这个代码呢?谢谢!
PRESERVE8
AREA UCOS_ARM_ASM_INT,CODE,READONLY
;*********************************************************************************************************
; IRQ HANDLER
;
; This handles all the IRQs
; Note: FIQ Handler should be written similar to this
;
;*********************************************************************************************************
;In μC/OS-II, ISRs includes several parts: save CPU registers, call function OSIntEnter(),
;execute user code, call function OSIntExit(), restore CPU registers and return.
;Function OSIntEnter() is used to notify μC/OS-II that you are about to service an interrupt (ISR)
;and function OSIntExit() is used to notify μC/OS-II that you have completed serving an ISR.
;With OSIntEnter() and OSIntExit(), μC/OS-II can keep track of interrupt nesting and thus only perform rescheduling at the last nested ISR.
;Sometime when the last nested ISR is completed, the interrupted task will be no longer the task that needs to run because a new,
; higher-priority task is now ready. In this case, interrupt level context switch is needed. This is done by function _IntCtxSw().
; Then after return, the new, higher-priority task is running and the old one is pending.
;These codes should be written in assembly language because you cannot access CPU registers directly from C.
; But user code can be written in C. Here we use macro code to implement ISR in file irq_handler.s.
; The code can be shown as following and should be duplicated for each ISR you have in your system.
IMPORT OSIntEnter
IMPORTOSIntExit
IMPORTOSIntCtxSwFlag
IMPORT_IntCtxSw
MACRO
$IRQ_AsmEntery HANDLER $IRQ_CEntry
EXPORT$IRQ_AsmEntery
IMPORT$IRQ_CEntry
$IRQ_AsmEnterySTMFD SP!,{R0-R3,R12,LR} ;Protects the task environments 保存任务环境
BL OSIntEnter ; Interrupt Nest++
BL $IRQ_CEntry ; User ISR Subroutine
BL OSIntExit
LDR R0,=OSIntCtxSwFlag
LDR R1,
CMP R1,#1
BEQ _IntCtxSw ; interrupt level context switch
LDMFD SP!,{R0-R3,R12,LR}
SUBS PC,LR,#4 ; return
MEND
IRQASMTimer0 HANDLER IRQCTimer0
IRQASMTimer1 HANDLER IRQCTimer1
IRQASMUart0 HANDLER uart0Isr
;IRQASMUart3 HANDLER uart3Isr
IRQASMi2c0 HANDLER i2c0IRQ
IRQ_Handler HANDLER IRQ_Exception
END 所以个人非常不喜欢UCOS2的中断处理。
个人对UCOS中断处理是:
1.所有中断直接用C写。由C自动生成保护现场代码。
2.用OsCtxSw替代OsIntCtxSw。
另外,可以把 临界段只关闭OS管理中断,不关闭非OS管理中断,非OS管理中断不受OS临界段影响,提高非OS管理中断中断实时性。 arm7好像没啥好办法,
因为IRQ异常管理所有的中断,快速中断除外。
办法有一个,就是采用快速中断。
不累加netsting,返回也不做别的处理,前后台那种中断操作方式
办法2 ,
借鉴freertos的移植方式。
任务调度有swi软中断来处理
IRQ中断由编译器产生自动保护
如果有调度需求,置标志量,调用上下文切换,完成任务调度
唯有一个中断需要手动保护,就是时钟节拍中断
这部分可以自己看freertos的移植代码
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