请大家帮帮忙
module mkts(rest,clock,clock_out);input clock,rest;
output clock_out;
reg fp_clock;
clock_fp(.clock_in(clock),.clock_o(clock_out),.fpxs(2),.clock_occz(1));
endmodule
/***********************************
clock_in:输入时钟信号
clock_out:输出分频信号
fpxs:分频系数
clock_occz:
************************************/
module clock_fp(clock_in,clock_o,fpxs,clock_occz);
input clock_in;
input fpxs;
input clock_occz;
output clock_o;
reg clock_o;
wire fpxs;
reg fpxs_ram;
initial
begin
fpxs_ram <= 0;
clock_o <=clock_occz;//这样初始化为什么不起作用????
end
always@(negedge clock_in)
//always@(clock_in)//为什么用这几代替上面那句就出不来波形??????
begin
if(fpxs_ram >= (fpxs-1))
begin
fpxs_ram <= 0;
clock_o <= ~clock_o;
end
else
begin
fpxs_ram <= fpxs_ram + 1;
end
end
endmodule
1:
initial
begin
fpxs_ram <= 0;
clock_o <=clock_occz;//这样初始化为什么不起作用????
end
2:
always@(negedge clock_in)
//always@(clock_in)//为什么用这几代替上面那句就出不来波形?????? 自已顶
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